/*
** ===================================================================
** Method : Cpu_SetOperationMode (component MK40DN512MD10)
**
** Description :
** This method requests to change the component's operation
** mode (RUN, WAIT, SLEEP, STOP). The target operation mode
** will be entered immediately.
** See <Operation mode settings> for further details of the
** operation modes mapping to low power modes of the cpu.
** Parameters :
** NAME - DESCRIPTION
** OperationMode - Requested driver
** operation mode
** ModeChangeCallback - Callback to
** notify the upper layer once a mode has been
** changed. Parameter is ignored, only for
** compatibility of API with other components.
** * ModeChangeCallbackParamPtr
** - Pointer to callback parameter to notify
** the upper layer once a mode has been
** changed. Parameter is ignored, only for
** compatibility of API with other components.
** Returns :
** --- - Error code
** ERR_OK - OK
** ERR_PARAM_MODE - Invalid operation mode
** ===================================================================
*/
LDD_TError Cpu_SetOperationMode(LDD_TDriverOperationMode OperationMode, LDD_TCallback ModeChangeCallback, LDD_TCallbackParam *ModeChangeCallbackParamPtr)
{
(void) ModeChangeCallback; /* Parameter is not used, suppress unused argument warning */
(void) ModeChangeCallbackParamPtr; /* Parameter is not used, suppress unused argument warning */
switch (OperationMode) {
case DOM_RUN:
/* SCB_SCR: SLEEPDEEP=0,SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~0x06UL;
if (ClockConfigurationID != 2U) {
if ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) { /* If in PBE mode, switch to PEE. PEE to PBE transition was caused by wakeup from low power mode. */
/* MCG_C1: CLKS=0,IREFS=0 */
MCG_C1 &= (uint8_t)~(uint8_t)0xC4U;
while( (MCG_S & MCG_S_LOCK0_MASK) == 0x00U) { /* Wait for PLL lock */
}
}
}
break;
case DOM_WAIT:
/* SCB_SCR: SLEEPDEEP=0 */
SCB_SCR &= (uint32_t)~0x04UL;
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~0x02UL;
PE_WFI();
break;
case DOM_SLEEP:
/* SCB_SCR: SLEEPDEEP=0 */
SCB_SCR &= (uint32_t)~0x04UL;
/* SMC_PMCTRL: STOPM=0 */
SMC_PMCTRL &= (uint8_t)~(uint8_t)0x07U;
/* SCB_SCR: SLEEPONEXIT=1 */
SCB_SCR |= (uint32_t)0x02UL;
PE_WFI();
break;
case DOM_STOP:
/* Clear LLWU flags */
/* LLWU_F1: WUF7=1,WUF6=1,WUF5=1,WUF4=1,WUF3=1,WUF2=1,WUF1=1,WUF0=1 */
LLWU_F1 = (uint8_t)0xFFU;
/* LLWU_F2: WUF15=1,WUF14=1,WUF13=1,WUF12=1,WUF11=1,WUF10=1,WUF9=1,WUF8=1 */
LLWU_F2 = (uint8_t)0xFFU;
/* LLWU_F3: MWUF7=1,MWUF6=1,MWUF5=1,MWUF4=1,MWUF3=1,MWUF2=1,MWUF1=1,MWUF0=1 */
LLWU_F3 = (uint8_t)0xFFU;
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~0x02UL;
/* SCB_SCR: SLEEPDEEP=1 */
SCB_SCR |= (uint32_t)0x04UL;
/* SMC_PMCTRL: STOPM=3 */
SMC_PMCTRL = (uint8_t)((SMC_PMCTRL & (uint8_t)~(uint8_t)0x04U) | (uint8_t)0x03U);
PE_WFI();
break;
default:
return ERR_PARAM_MODE;
}
return ERR_OK;
}
LDD_TError CPU_SetOperationMode(LDD_TDriverOperationMode OperationMode, LDD_TCallback ModeChangeCallback, LDD_TCallbackParam *ModeChangeCallbackParamPtr)
{
(void) ModeChangeCallback; /* Parameter is not used, suppress unused argument warning */
(void) ModeChangeCallbackParamPtr; /* Parameter is not used, suppress unused argument warning */
switch (OperationMode) {
case DOM_RUN:
/* SCB_SCR: SLEEPDEEP=0,SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(
SCB_SCR_SLEEPDEEP_MASK |
SCB_SCR_SLEEPONEXIT_MASK
); /* Set RUN mode */
break;
case DOM_WAIT:
/* SCB_SCR: SLEEPDEEP=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPDEEP_MASK); /* WAIT= mode can be entered after WFI instruction call */
#if CPU_LOW_POWER_WAIT_SLEEP_ON_EXIT
/* SCB_SCR: SLEEPONEXIT=1 */
SCB_SCR |= SCB_SCR_SLEEPONEXIT_MASK; /* Enter wait state on ISR exit */
#else /* CPU_LOW_POWER_WAIT_SLEEP_ON_EXIT */
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPONEXIT_MASK); /* Do not enter wait state on ISR exit */
#endif /* CPU_LOW_POWER_WAIT_SLEEP_ON_EXIT */
PE_WFI(); /* Enter WAIT state */
break;
case DOM_SLEEP:
/* SCB_SCR: SLEEPDEEP=1 */
SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK; /* STOP mode can be entered after WFI instruction call */
#if CPU_LOW_POWER_SLEEP_SLEEP_ON_EXIT
/* SCB_SCR: SLEEPONEXIT=1 */
SCB_SCR |= SCB_SCR_SLEEPONEXIT_MASK; /* Enter stop state on ISR exit */
#else /* CPU_LOW_POWER_SLEEP_SLEEP_ON_EXIT */
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPONEXIT_MASK); /* Do not enter stop state on ISR exit */
#endif /* CPU_LOW_POWER_SLEEP_SLEEP_ON_EXIT */
PE_WFI(); /* Enter STOP state */
break;
case DOM_STOP:
#if CPU_LOW_POWER_STOP
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPONEXIT_MASK); /* Do not enter stop state on ISR exit */
/* SCB_SCR: SLEEPDEEP=1 */
SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK; /* STOP mode can be entered after WFI instruction call */
PE_WFI(); /* Enter STOP state */
#endif /* CPU_LOW_POWER_STOP */
break;
default:
return ERR_PARAM_MODE;
}
return ERR_OK;
}
/* ===================================================================*/
LDD_TError Cpu_SetOperationMode(LDD_TDriverOperationMode OperationMode, LDD_TCallback ModeChangeCallback, LDD_TCallbackParam *ModeChangeCallbackParamPtr)
{
(void) ModeChangeCallback; /* Parameter is not used, suppress unused argument warning */
(void) ModeChangeCallbackParamPtr; /* Parameter is not used, suppress unused argument warning */
switch (OperationMode) {
case DOM_RUN:
/* SCB_SCR: SLEEPDEEP=0,SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(
SCB_SCR_SLEEPDEEP_MASK |
SCB_SCR_SLEEPONEXIT_MASK
);
if (ClockConfigurationID != 2U) {
if ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) { /* If in PBE mode, switch to PEE. PEE to PBE transition was caused by wakeup from low power mode. */
/* MCG_C1: CLKS=0,IREFS=0 */
MCG_C1 &= (uint8_t)~(uint8_t)((MCG_C1_CLKS(0x03) | MCG_C1_IREFS_MASK));
while( (MCG_S & MCG_S_LOCK0_MASK) == 0x00U) { /* Wait for PLL lock */
}
}
}
break;
case DOM_WAIT:
/* SCB_SCR: SLEEPDEEP=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPDEEP_MASK);
/* SCB_SCR: SLEEPONEXIT=0 */
SCB_SCR &= (uint32_t)~(uint32_t)(SCB_SCR_SLEEPONEXIT_MASK);
PE_WFI();
break;
case DOM_SLEEP:
/* SCB_SCR: SLEEPDEEP=1 */
SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK;
/* SMC_PMCTRL: STOPM=0 */
SMC_PMCTRL &= (uint8_t)~(uint8_t)(SMC_PMCTRL_STOPM(0x07));
(void)(SMC_PMCTRL == 0U); /* Dummy read of SMC_PMCTRL to ensure the register is written before enterring low power mode */
/* SCB_SCR: SLEEPONEXIT=1 */
SCB_SCR |= SCB_SCR_SLEEPONEXIT_MASK;
PE_WFI();
break;
case DOM_STOP:
break;
default:
return ERR_PARAM_MODE;
}
return ERR_OK;
}
