bool miot_uart_dev_init(struct miot_uart_state *us) {
struct miot_uart_config *cfg = us->cfg;
if (!esp_uart_validate_config(cfg)) return false;
ETS_INTR_DISABLE(ETS_UART_INUM);
uart_div_modify(us->uart_no, UART_CLK_FREQ / cfg->baud_rate);
if (us->uart_no == 0) {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
if (cfg->swap_rxcts_txrts) {
SET_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
} else {
CLEAR_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
}
} else {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
if (cfg->swap_rxcts_txrts) {
SET_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART1_PIN_SWAP);
} else {
CLEAR_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART1_PIN_SWAP);
}
}
unsigned int conf0 = 0b011100; /* 8-N-1 */
if (cfg->tx_fc_ena) {
conf0 |= UART_TX_FLOW_EN;
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS);
}
WRITE_PERI_REG(UART_CONF0(us->uart_no), conf0);
unsigned int conf1 = cfg->rx_fifo_full_thresh;
conf1 |= (cfg->tx_fifo_empty_thresh << 8);
if (cfg->rx_fifo_alarm >= 0) {
conf1 |= UART_RX_TOUT_EN | ((cfg->rx_fifo_alarm & 0x7f) << 24);
}
if (cfg->rx_fc_ena && cfg->rx_fifo_fc_thresh > 0) {
/* UART_RX_FLOW_EN will be set in uart_start. */
conf1 |= ((cfg->rx_fifo_fc_thresh & 0x7f) << 16);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
}
WRITE_PERI_REG(UART_CONF1(us->uart_no), conf1);
s_us[us->uart_no] = us;
/* Start with TX and RX ints disabled. */
WRITE_PERI_REG(UART_INT_ENA(us->uart_no), UART_INFO_INTS);
ETS_UART_INTR_ATTACH(esp_uart_isr, NULL);
ETS_INTR_ENABLE(ETS_UART_INUM);
return true;
}
/******************************************************************************
* FunctionName : uart_config
* Description : Internal used function
* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
* UART1 just used for debug output
* Parameters : uart_no, use UART0 or UART1 defined ahead
* Returns : NONE
*******************************************************************************/
static void ICACHE_FLASH_ATTR
uart_config(uint8 uart_no)
{
if (uart_no == UART1) {
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
//PIN_PULLDWN_DIS(PERIPHS_IO_MUX_GPIO2_U);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
} else {
/* rcv_buff size is 0x100 */
ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0TXD_U);
//PIN_PULLDWN_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0RXD_U);
//PIN_PULLDWN_DIS(PERIPHS_IO_MUX_U0RXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, 0); // FUNC_U0RXD==0
}
uart_div_modify(uart_no, UART_CLK_FREQ / UartDev.baut_rate);
if (uart_no == UART1) //UART 1 always 8 N 1
WRITE_PERI_REG(UART_CONF0(uart_no),
CALC_UARTMODE(EIGHT_BITS, NONE_BITS, ONE_STOP_BIT));
else
WRITE_PERI_REG(UART_CONF0(uart_no),
CALC_UARTMODE(UartDev.data_bits, UartDev.parity, UartDev.stop_bits));
//clear rx and tx fifo,not ready
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
if (uart_no == UART0) {
// Configure RX interrupt conditions as follows: trigger rx-full when there are 80 characters
// in the buffer, trigger rx-timeout when the fifo is non-empty and nothing further has been
// received for 4 character periods.
// Set the hardware flow-control to trigger when the FIFO holds 100 characters, although
// we don't really expect the signals to actually be wired up to anything. It doesn't hurt
// to set the threshold here...
// We do not enable framing error interrupts 'cause they tend to cause an interrupt avalanche
// and instead just poll for them when we get a std RX interrupt.
WRITE_PERI_REG(UART_CONF1(uart_no),
((80 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
((100 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
UART_RX_FLOW_EN |
(4 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
UART_RX_TOUT_EN);
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA);
} else {
WRITE_PERI_REG(UART_CONF1(uart_no),
((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
}
//clear all interrupt
WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
}
/**
* Sets the pull up and pull down registers for a pin.
*/
static void ICACHE_FLASH_ATTR
easygpio_setupPulls(uint32_t gpio_name, bool pullUp, bool pullDown) {
if (pullUp) {
PIN_PULLDWN_DIS(gpio_name);
PIN_PULLUP_EN(gpio_name);
} else if (pullDown) {
PIN_PULLUP_DIS(gpio_name);
PIN_PULLDWN_EN(gpio_name);
} else {
PIN_PULLDWN_DIS(gpio_name);
PIN_PULLUP_DIS(gpio_name);
}
}
/**
* Sets the pull up and pull down registers for a pin.
* This seems to do very little for the actual pull effect
* - it's always pull up for both EASYGPIO_PULLUP and EASYGPIO_PULLDOWN.
* But that is something the SDK needs to fix.
*/
static void ICACHE_FLASH_ATTR
easygpio_setupPullsByName(uint32_t gpio_name, EasyGPIO_PullStatus pullStatus) {
if (EASYGPIO_PULLUP == pullStatus){
PIN_PULLDWN_DIS(gpio_name);
PIN_PULLUP_EN(gpio_name);
} else if (EASYGPIO_PULLDOWN == pullStatus){
PIN_PULLUP_DIS(gpio_name);
PIN_PULLDWN_EN(gpio_name);
} else {
PIN_PULLDWN_DIS(gpio_name);
PIN_PULLUP_DIS(gpio_name);
}
}
/*** Main function ***/
void ICACHE_FLASH_ATTR user_init() {
uart_div_modify(0, UART_CLK_FREQ / BAUD);
os_printf("Startup from %d...\r\n", system_get_rst_info()->reason);
gpio_init();
ap_init();
// HTTPD
espFsInit((void*)(webpages_espfs_start));
httpdInit(builtInUrls, 80);
// Set GPIO2 (DCF77 pin) to input, disable pullup
gpio_output_set(0, 0, 0, 2);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
// DCF77 read timer
os_timer_disarm(&dcf_read_timer);
os_timer_setfn(&dcf_read_timer, (os_timer_func_t *) dcf_read_timer_cb, NULL);
os_timer_arm(&dcf_read_timer, 5, 1);
// Second increase timer
os_timer_disarm(&time_inc_timer);
os_timer_setfn(&time_inc_timer, (os_timer_func_t *) time_inc_timer_cb, NULL);
os_timer_arm(&time_inc_timer, 1000, 1);
// DCF77 decode timer: decide wheter 1 or 0
dcf_decode_timer_adjust();
os_printf(" completed!\r\n\r\n");
system_os_task(loop, user_procTaskPrio, user_procTaskQueue, user_procTaskQueueLen);
system_os_post(user_procTaskPrio, 0, 0);
}
void user_init(void) {
// Uart init
uart_div_modify(0, UART_CLK_FREQ / 115200);
os_printf("\nStarting...\n");
int i;
for(i=0; i<MAX_CONNS; i++) {
// c field is used as indicator for free/used connection slots
conns[i].id = 0;
}
// Add page to ureq
//ureq_serve("/", s_home, "GET");
ureq_serve("/get", s_get, "GET");
ureq_serve("/post", s_post, "ALL");
ureq_serve("/redirect", s_redirect, "GET");
ureq_serve("/redirected", s_redirected, "GET");
// Some gpio-related stuff
gpio_init();
//Set GPIO2 to output mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO0_U);
//Set GPIO2 high
gpio_output_set(BIT0, 0, BIT0, 0);
// Wifi setup
wifiInit();
ssServerInit();
// Print a message that we have completed user_init on debug uart
os_printf("Ready.\n");
}
void user_init(void) {
uart_div_modify(0, UART_CLK_FREQ / 115200);
os_delay_us(500);
printf("SDK version : %s\n", system_get_sdk_version());
mainqueue = xQueueCreate(10, sizeof(my_event_t));
connectToAp();
//setap("test", 4);
init_led();
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO5_U, FUNC_GPIO5);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO5_U); // disable pullodwn
GPIO_REG_WRITE(GPIO_ENABLE_W1TS_ADDRESS,BIT5);
GPIO_OUTPUT_SET(GPIO_ID_PIN(5), 1);
char outbuffer[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
WS2812OutBuffer( outbuffer, 6 , 0); //Initialize the output.
write_textwall_buffer(0, "BIER ", 5);
xTaskCreate(simple_task, (signed char * )"simple_task", 256, &mainqueue, tskIDLE_PRIORITY, NULL);
xTaskCreate(receive_udp, (signed char * )"test", 256, &mainqueue, tskIDLE_PRIORITY, NULL);
timerHandle = xTimerCreate((signed char *) "Trigger", 50 / portTICK_RATE_MS, pdTRUE, NULL, timer_cb);
if (timerHandle != NULL) {
if (xTimerStart(timerHandle, 0) != pdPASS) {
printf("%s: Unable to start Timer ...\n", __FUNCTION__);
}
} else {
printf("%s: Unable to create Timer ...\n", __FUNCTION__);
}
}
void ICACHE_FLASH_ATTR user_init()
{
// Initialize the GPIO subsystem.
//UART_init(BIT_RATE_115200, BIT_RATE_115200, 0);
//UART_SetPrintPort(UART0);
stdout_init();
i2c_master_gpio_init();
user_set_station_config();
pcf8754_i2c_write_byte(I2C_INPUT_ADDRESS, 0);
// =================================================
// Initialize GPIO2 and GPIO0 as GPIO
// =================================================
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_GPIO3);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0RXD_U);
gpio_output_set(0, 0, 0, GPIO_ID_PIN(3)); // set set gpio 0 as input
ETS_GPIO_INTR_DISABLE();
// Attach interrupt handle to gpio interrupts.
ETS_GPIO_INTR_ATTACH(gpio_intr_handler, NULL);
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(3)); // clear gpio status
gpio_pin_intr_state_set(GPIO_ID_PIN(3), GPIO_PIN_INTR_ANYEDGE); // clear gpio status.
ETS_GPIO_INTR_ENABLE(); // Enable interrupts by GPIO
// register a callback function to let user code know that system
// initialization is complete
system_init_done_cb(&post_user_init_func);
//Start os task
system_os_task(user_procTask, user_procTaskPrio,user_procTaskQueue, user_procTaskQueueLen);
}
irom static void select_pin_function(const gpio_t *gpio)
{
if(gpio->flags.rtc_gpio)
return;
pin_func_select(gpio->io_mux, gpio->io_func);
PIN_PULLUP_DIS(gpio->io_mux);
}
void gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
{
uint32 gpio_pin_mask = pGPIOConfig->GPIO_Pin;
uint32 gpio_pin_mask_high = pGPIOConfig->GPIO_Pin_high;
uint32 io_reg;
uint8 io_num = 0;
uint32 pin_reg;
uint32 bit_valid;
if (pGPIOConfig->GPIO_Mode == GPIO_Mode_Input) {
GPIO_AS_INPUT(gpio_pin_mask);
GPIO_AS_INPUT_HIGH(gpio_pin_mask_high);
} else if (pGPIOConfig->GPIO_Mode == GPIO_Mode_Output) {
GPIO_AS_OUTPUT(gpio_pin_mask);
GPIO_AS_OUTPUT_HIGH(gpio_pin_mask_high);
}
do {
bit_valid = (io_num >= 32 ? (gpio_pin_mask_high & (0x1 << (io_num - 32))) : (gpio_pin_mask & (0x1 << io_num)));
if (bit_valid && (io_reg = GPIO_PIN_REG[io_num])) {
if (pGPIOConfig->GPIO_Mode == GPIO_Mode_Input) {
SET_PERI_REG_MASK(io_reg, FUN_IE);
}
//for ESP32 function 2 of every pad is allways GPIO func
PIN_FUNC_SELECT(io_reg, 2);
if (pGPIOConfig->GPIO_Pullup) {
PIN_PULLUP_EN(io_reg);
} else {
PIN_PULLUP_DIS(io_reg);
}
if (pGPIOConfig->GPIO_Pulldown) {
PIN_PULLDWN_EN(io_reg);
} else {
PIN_PULLDWN_DIS(io_reg);
}
if (pGPIOConfig->GPIO_Mode == GPIO_Mode_Out_OD) {
portENTER_CRITICAL();
pin_reg = GPIO_REG_READ(GPIO_PIN_ADDR(io_num));
//pin_reg &= (~GPIO_GPIO_PIN0_PAD_DRIVER);
pin_reg |= GPIO_GPIO_PIN0_PAD_DRIVER;
GPIO_REG_WRITE(GPIO_PIN_ADDR(io_num), pin_reg);
portEXIT_CRITICAL();
}
gpio_pin_intr_state_set(io_num, pGPIOConfig->GPIO_IntrType);
}
io_num++;
} while (io_num < GPIO_PIN_COUNT);
}
void ICACHE_FLASH_ATTR dhgpio_pull(unsigned int pollup_mask, unsigned int nopoll_mask) {
if(pollup_mask & PIN_GPIOO)
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO0_U);
if(pollup_mask & PIN_GPIO1)
PIN_PULLUP_EN(PERIPHS_IO_MUX_U0TXD_U);
if(pollup_mask & PIN_GPIO2)
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO2_U);
if(pollup_mask & PIN_GPIO3)
PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
if(pollup_mask & PIN_GPIO4)
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO4_U);
if(pollup_mask & PIN_GPIO5)
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO5_U);
if(pollup_mask & PIN_GPIO12)
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTDI_U);
if(pollup_mask & PIN_GPIO13)
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTCK_U);
if(pollup_mask & PIN_GPIO14)
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTMS_U);
if(pollup_mask & PIN_GPIO15)
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTDO_U);
if(nopoll_mask & PIN_GPIOO)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO0_U);
if(nopoll_mask & PIN_GPIO1)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
if(nopoll_mask & PIN_GPIO2)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
if(nopoll_mask & PIN_GPIO3)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0RXD_U);
if(nopoll_mask & PIN_GPIO4)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO4_U);
if(nopoll_mask & PIN_GPIO5)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO5_U);
if(nopoll_mask & PIN_GPIO12)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDI_U);
if(nopoll_mask & PIN_GPIO13)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTCK_U);
if(nopoll_mask & PIN_GPIO14)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTMS_U);
if(nopoll_mask & PIN_GPIO15)
PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDO_U);
}
void ICACHE_FLASH_ATTR
init_gpio(void)
{
ETS_GPIO_INTR_DISABLE();
gpio_init();
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
}
void mp_hal_pin_output(mp_hal_pin_obj_t pin_id) {
pin_mode[pin_id] = GPIO_MODE_OUTPUT;
if (pin_id == 16) {
WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1);
WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1);
WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output
} else {
const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id];
PIN_FUNC_SELECT(self->periph, self->func);
PIN_PULLUP_DIS(self->periph);
gpio_output_set(0, 0, 1 << self->phys_port, 0);
}
}
int platform_gpio_mode( unsigned pin, unsigned mode, unsigned pull )
{
NODE_DBG("Function platform_gpio_mode() is called. pin_mux:%d, func:%d\n", pin_mux[pin], pin_func[pin]);
if (pin >= NUM_GPIO)
return -1;
if(pin == 0){
if(mode==PLATFORM_GPIO_INPUT)
gpio16_input_conf();
else
gpio16_output_conf();
return 1;
}
#ifdef LUA_USE_MODULES_PWM
platform_pwm_close(pin); // closed from pwm module, if it is used in pwm
#endif
if (pull == PLATFORM_GPIO_PULLUP) {
PIN_PULLUP_EN(pin_mux[pin]);
} else {
PIN_PULLUP_DIS(pin_mux[pin]);
}
switch(mode){
case PLATFORM_GPIO_INPUT:
GPIO_DIS_OUTPUT(pin_num[pin]);
set_gpio_no_interrupt(pin, TRUE);
break;
case PLATFORM_GPIO_OUTPUT:
set_gpio_no_interrupt(pin, TRUE);
GPIO_REG_WRITE(GPIO_ENABLE_W1TS_ADDRESS, BIT(pin_num[pin]));
break;
case PLATFORM_GPIO_OPENDRAIN:
set_gpio_no_interrupt(pin, FALSE);
GPIO_REG_WRITE(GPIO_ENABLE_W1TS_ADDRESS, BIT(pin_num[pin]));
break;
#ifdef GPIO_INTERRUPT_ENABLE
case PLATFORM_GPIO_INT:
set_gpio_interrupt(pin);
break;
#endif
default:
break;
}
return 1;
}
/**
* Set the state of the specific pin.
*
* The possible states are:
*
* JSHPINSTATE_UNDEFINED
* JSHPINSTATE_GPIO_OUT
* JSHPINSTATE_GPIO_OUT_OPENDRAIN
* JSHPINSTATE_GPIO_IN
* JSHPINSTATE_GPIO_IN_PULLUP
* JSHPINSTATE_GPIO_IN_PULLDOWN
* JSHPINSTATE_ADC_IN
* JSHPINSTATE_AF_OUT
* JSHPINSTATE_AF_OUT_OPENDRAIN
* JSHPINSTATE_USART_IN
* JSHPINSTATE_USART_OUT
* JSHPINSTATE_DAC_OUT
* JSHPINSTATE_I2C
*/
void jshPinSetState(Pin pin, //!< The pin to have its state changed.
JshPinState state //!< The new desired state of the pin.
) {
// Debug
// os_printf("> ESP8266: jshPinSetState %d, %s\n", pin, pinStateToString(state));
assert(pin < 16);
int periph = PERIPHS_IO_MUX + PERIPHS[pin];
// Disable the pin's pull-up.
PIN_PULLUP_DIS(periph);
//PIN_PULLDWN_DIS(periph);
uint8_t primary_func =
pin < 6 ?
(PERIPHS_IO_MUX_U0TXD_U == pin
|| PERIPHS_IO_MUX_U0RXD_U == pin) ?
FUNC_UART : FUNC_GPIO
: 0;
uint8_t select_func = pinFunction(state);
PIN_FUNC_SELECT(periph, primary_func == select_func ? 0 : select_func);
switch (state) {
case JSHPINSTATE_GPIO_OUT:
case JSHPINSTATE_GPIO_OUT_OPENDRAIN:
//case JSHPINSTATE_AF_OUT:
//case JSHPINSTATE_AF_OUT_OPENDRAIN:
//case JSHPINSTATE_USART_OUT:
//case JSHPINSTATE_DAC_OUT:
gpio_output_set(0, 1 << pin, 1 << pin, 0);
break;
case JSHPINSTATE_GPIO_IN_PULLUP:
PIN_PULLUP_EN(periph);
//case JSHPINSTATE_GPIO_IN_PULLDOWN: if (JSHPINSTATE_GPIO_IN_PULLDOWN == pin) PIN_PULLDWN_EN(periph);
case JSHPINSTATE_GPIO_IN:
gpio_output_set(0, 0, 0, 1 << pin);
break;
case JSHPINSTATE_ADC_IN:
case JSHPINSTATE_USART_IN:
case JSHPINSTATE_I2C:
PIN_PULLUP_EN(periph);
break;
default:
break;
}
}
void gpio_configure(port_t *port) {
/* set GPIO function */
if (port->port_no >= GPIO12_NO && port->port_no <= GPIO15_NO) {
PIN_FUNC_SELECT(ports_get_gpio_mux(port->port_no), 3 /* function number 3 is the GPIO */);
}
if (IS_OUTPUT(port)) {
if (IS_PULL_UP(port)) {
PIN_PULLUP_EN(ports_get_gpio_mux(port->port_no));
}
else {
PIN_PULLUP_DIS(ports_get_gpio_mux(port->port_no));
}
}
else {
GPIO_DIS_OUTPUT(port->port_no);
}
}
void UARTInit() {
//Enable TxD pin
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
//Set baud rate and other serial parameters to 115200,n,8,1
uart_div_modify(0, UART_CLK_FREQ/BIT_RATE_115200);
WRITE_PERI_REG(UART_CONF0(0), (STICK_PARITY_DIS)|(ONE_STOP_BIT << UART_STOP_BIT_NUM_S)| \
(EIGHT_BITS << UART_BIT_NUM_S));
//Reset tx & rx fifo
SET_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST|UART_TXFIFO_RST);
CLEAR_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST|UART_TXFIFO_RST);
//Clear pending interrupts
WRITE_PERI_REG(UART_INT_CLR(0), 0xffff);
//Install our own putchar handler
os_install_putc1((void *)UARTPutChar);
}
void ICACHE_FLASH_ATTR
user_init(void)
{
#ifndef NDEBUG
uart_init(9600, 9600);
#endif
gpio_init();
/* set GPIO0 and GPIO2 as HIGH outputs */
gpio_output_set(GPIO0 | GPIO2, 0, GPIO0 | GPIO2, 0);
/* select GPIO2 function for GPIO2 pin */
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
wifi_set_event_handler_cb(wifi_event_handler);
client_connection_setup();
}
void Softuart_EnableRs485(Softuart *s, uint8_t gpio_id)
{
os_printf("SOFTUART RS485 init\r\n");
//enable rs485
s->is_rs485 = 1;
//set pin in instance
s->pin_rs485_tx_enable = gpio_id;
//enable pin as gpio
PIN_FUNC_SELECT(softuart_reg[gpio_id].gpio_mux_name,softuart_reg[gpio_id].gpio_func);
PIN_PULLUP_DIS(softuart_reg[gpio_id].gpio_mux_name);
//set low for tx idle (so other bus participants can send)
GPIO_OUTPUT_SET(GPIO_ID_PIN(gpio_id), 0);
os_printf("SOFTUART RS485 init done\r\n");
}
static void uartRxInit()
{
uint32_t reg_val;
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
// reg_val = READ_PERI_REG(UART_CONF1(0));
reg_val = (1 << UART_RXFIFO_FULL_THRHD_S);
WRITE_PERI_REG(UART_CONF1_REG(0), reg_val);
CLEAR_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_TXFIFO_EMPTY_INT_ENA | UART_RXFIFO_TOUT_INT_ENA);
SET_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_RXFIFO_FULL_INT_ENA);
printf("Enabling int %d\n", ETS_UART0_INUM);
DPORT_REG_SET_FIELD(DPORT_PRO_UART_INTR_MAP_REG, DPORT_PRO_UART_INTR_MAP, ETS_UART0_INUM);
DPORT_REG_SET_FIELD(DPORT_PRO_UART1_INTR_MAP_REG, DPORT_PRO_UART1_INTR_MAP, ETS_UART0_INUM);
xt_set_interrupt_handler(ETS_UART0_INUM, uartIsrHdl, NULL);
xt_ints_on(1 << ETS_UART0_INUM);
}
void
UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef *pUARTConfig)
{
if (uart_no == UART1) {
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
} else {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
}
UART_SetFlowCtrl(uart_no, pUARTConfig->flow_ctrl, pUARTConfig->UART_RxFlowThresh);
UART_SetBaudrate(uart_no, pUARTConfig->baud_rate);
WRITE_PERI_REG(UART_CONF0(uart_no),
((pUARTConfig->parity == USART_Parity_None) ? 0x0 : (UART_PARITY_EN | pUARTConfig->parity))
| (pUARTConfig->stop_bits << UART_STOP_BIT_NUM_S)
| (pUARTConfig->data_bits << UART_BIT_NUM_S)
| ((pUARTConfig->flow_ctrl & USART_HardwareFlowControl_CTS) ? UART_TX_FLOW_EN : 0x0)
| pUARTConfig->UART_InverseMask);
UART_ResetFifo(uart_no);
}
void HardwareSerial::begin(const uint32_t baud/* = 9600*/)
{
//TODO: Move to params!
UartDev.baut_rate = (UartBautRate)baud;
UartDev.parity = NONE_BITS;
UartDev.exist_parity = STICK_PARITY_DIS;
UartDev.stop_bits = ONE_STOP_BIT;
UartDev.data_bits = EIGHT_BITS;
ETS_UART_INTR_ATTACH((void*)uart0_rx_intr_handler, &(UartDev.rcv_buff));
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
uart_div_modify(uart, UART_CLK_FREQ / (UartDev.baut_rate));
WRITE_PERI_REG(UART_CONF0(uart), UartDev.exist_parity
| UartDev.parity
| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
| (UartDev.data_bits << UART_BIT_NUM_S));
//clear rx and tx fifo,not ready
SET_PERI_REG_MASK(UART_CONF0(uart), UART_RXFIFO_RST | UART_TXFIFO_RST);
CLEAR_PERI_REG_MASK(UART_CONF0(uart), UART_RXFIFO_RST | UART_TXFIFO_RST);
//set rx fifo trigger
WRITE_PERI_REG(UART_CONF1(uart), (UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S);
//clear all interrupt
WRITE_PERI_REG(UART_INT_CLR(uart), 0xffff);
//enable rx_interrupt
SET_PERI_REG_MASK(UART_INT_ENA(uart), UART_RXFIFO_FULL_INT_ENA);
ETS_UART_INTR_ENABLE();
delay(10);
Serial.println("\r\n"); // after SPAM :)
}
bool mgos_uart_hal_configure(struct mgos_uart_state *us,
const struct mgos_uart_config *cfg) {
if (!esp_uart_validate_config(cfg)) return false;
#ifdef RTOS_SDK
_xt_isr_mask(1 << ETS_UART_INUM);
#else
ETS_INTR_DISABLE(ETS_UART_INUM);
#endif
uart_div_modify(us->uart_no, UART_CLK_FREQ / cfg->baud_rate);
if (us->uart_no == 0) {
if (cfg->dev.swap_rxcts_txrts) {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTCK_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 4 /* FUNC_U0CTS */);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
SET_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
} else {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, 0 /* FUNC_U0RXD */);
CLEAR_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
}
} else {
if (cfg->dev.swap_rxcts_txrts) {
/* Swapping pins of UART1 is not supported, they all conflict with SPI
* flash anyway. */
return false;
} else {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
}
}
unsigned int conf0 = 0;
switch (cfg->num_data_bits) {
case 5:
break;
case 6:
conf0 |= 1 << UART_BIT_NUM_S;
break;
case 7:
conf0 |= 2 << UART_BIT_NUM_S;
break;
case 8:
conf0 |= 3 << UART_BIT_NUM_S;
break;
default:
return false;
}
switch (cfg->parity) {
case MGOS_UART_PARITY_NONE:
break;
case MGOS_UART_PARITY_EVEN:
conf0 |= UART_PARITY_EN;
break;
case MGOS_UART_PARITY_ODD:
conf0 |= (UART_PARITY_EN | UART_PARITY_ODD);
break;
}
switch (cfg->stop_bits) {
case MGOS_UART_STOP_BITS_1:
conf0 |= 1 << UART_STOP_BIT_NUM_S;
break;
case MGOS_UART_STOP_BITS_1_5:
conf0 |= 2 << UART_STOP_BIT_NUM_S;
break;
case MGOS_UART_STOP_BITS_2:
conf0 |= 3 << UART_STOP_BIT_NUM_S;
break;
}
if (cfg->tx_fc_type == MGOS_UART_FC_HW) {
conf0 |= UART_TX_FLOW_EN;
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS);
}
WRITE_PERI_REG(UART_CONF0(us->uart_no), conf0);
unsigned int conf1 = cfg->dev.rx_fifo_full_thresh;
conf1 |= (cfg->dev.tx_fifo_empty_thresh << 8);
if (cfg->dev.rx_fifo_alarm >= 0) {
conf1 |= UART_RX_TOUT_EN | ((cfg->dev.rx_fifo_alarm & 0x7f) << 24);
}
if (cfg->rx_fc_type == MGOS_UART_FC_HW && cfg->dev.rx_fifo_fc_thresh > 0) {
/* UART_RX_FLOW_EN will be set in uart_start. */
conf1 |= ((cfg->dev.rx_fifo_fc_thresh & 0x7f) << 16);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
}
WRITE_PERI_REG(UART_CONF1(us->uart_no), conf1);
#ifdef RTOS_SDK
_xt_isr_unmask(1 << ETS_UART_INUM);
#else
ETS_INTR_ENABLE(ETS_UART_INUM);
#endif
return true;
}
void pinstate_init(void) {
gpio_init();
PIN_FUNC_SELECT(PINSTATE_PIN_MUX, PINSTATE_PIN_FUNC);
PIN_PULLUP_DIS(PINSTATE_PIN_MUX);
pinstate_set(false);
}
int esp_uart_init(struct esp_uart_config *cfg) {
if (cfg == NULL || !esp_uart_validate_config(cfg)) return 0;
struct esp_uart_state *us = s_us[cfg->uart_no];
if (us != NULL) {
s_us[cfg->uart_no] = NULL;
esp_uart_deinit(us);
}
us = calloc(1, sizeof(*us));
us->cfg = cfg;
cs_rbuf_init(&us->rx_buf, cfg->rx_buf_size);
cs_rbuf_init(&us->tx_buf, cfg->tx_buf_size);
ETS_INTR_DISABLE(ETS_UART_INUM);
uart_div_modify(cfg->uart_no, UART_CLK_FREQ / cfg->baud_rate);
if (cfg->uart_no == 0) {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
if (cfg->swap_rxtx_ctsrts) {
SET_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
} else {
CLEAR_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART0_PIN_SWAP);
}
} else {
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
if (cfg->swap_rxtx_ctsrts) {
SET_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART1_PIN_SWAP);
} else {
CLEAR_PERI_REG_MASK(PERIPHS_DPORT_BASEADDR + HOST_INF_SEL,
PERI_IO_UART1_PIN_SWAP);
}
}
unsigned int conf0 = 0b011100; /* 8-N-1 */
if (cfg->tx_fc_ena) {
conf0 |= UART_TX_FLOW_EN;
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS);
}
WRITE_PERI_REG(UART_CONF0(cfg->uart_no), conf0);
unsigned int conf1 = cfg->rx_fifo_full_thresh;
conf1 |= (cfg->tx_fifo_empty_thresh << 8);
if (cfg->rx_fifo_alarm >= 0) {
conf1 |= UART_RX_TOUT_EN | ((cfg->rx_fifo_alarm & 0x7f) << 24);
}
if (cfg->rx_fc_ena && cfg->rx_fifo_fc_thresh > 0) {
/* UART_RX_FLOW_EN will be set in uart_start. */
conf1 |= ((cfg->rx_fifo_fc_thresh & 0x7f) << 16);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
}
WRITE_PERI_REG(UART_CONF1(cfg->uart_no), conf1);
if (cfg->status_interval_ms > 0) {
os_timer_disarm(&us->status_timer);
os_timer_setfn(&us->status_timer, esp_uart_print_status, us);
os_timer_arm(&us->status_timer, cfg->status_interval_ms, 1 /* repeat */);
}
s_us[cfg->uart_no] = us;
/* Start with TX and RX ints disabled. */
WRITE_PERI_REG(UART_INT_ENA(cfg->uart_no), UART_INFO_INTS);
ETS_UART_INTR_ATTACH(esp_uart_isr, NULL);
ETS_INTR_ENABLE(ETS_UART_INUM);
return 1;
}
void ICACHE_FLASH_ATTR
supla_esp_gpio_init(void) {
switch_cfgbtn_state_check = 0;
switch_cfgbtn_last_state = -1;
switch_cfgbtn_counter = 0;
#if defined(USE_GPIO3) || defined(UART_SWAP)
system_uart_swap ();
#endif
ETS_GPIO_INTR_DISABLE();
GPIO_PORT_INIT;
#ifdef USE_GPIO16_INPUT
gpio16_input_conf();
#endif
#ifdef USE_GPIO16_OUTPUT
gpio16_output_conf();
#endif
#ifdef USE_GPIO3
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_GPIO3);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0RXD_U);
#endif
#ifdef BTN_PULLUP
#if CFG_PORT == 0
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO0_U);
#elif CFG_PORT == 2
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO2_U);
#elif CFG_PORT == 4
PIN_PULLUP_EN(PERIPHS_IO_MUX_GPIO4_U);
#elif CFG_PORT == 12
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTDI_U);
#elif CFG_PORT == 13
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTCK_U);
#elif CFG_PORT == 14
PIN_PULLUP_EN(PERIPHS_IO_MUX_MTMS_U);
#endif
#endif
#ifdef LED_RED_PORT
#if LED_RED_PORT != 16
gpio_pin_intr_state_set(GPIO_ID_PIN(LED_RED_PORT), GPIO_PIN_INTR_DISABLE);
#endif
#endif
#ifdef LED_GREEN_PORT
gpio_pin_intr_state_set(GPIO_ID_PIN(LED_GREEN_PORT), GPIO_PIN_INTR_DISABLE);
#endif
#ifdef LED_BLUE_PORT
gpio_pin_intr_state_set(GPIO_ID_PIN(LED_BLUE_PORT), GPIO_PIN_INTR_DISABLE);
#endif
#ifdef RELAY1_PORT
gpio_pin_intr_state_set(GPIO_ID_PIN(RELAY1_PORT), GPIO_PIN_INTR_DISABLE);
#endif
#ifdef RELAY2_PORT
gpio_pin_intr_state_set(GPIO_ID_PIN(RELAY2_PORT), GPIO_PIN_INTR_DISABLE);
#endif
#ifdef ZAM_INPUT1
supla_esp_gpio_enable_input_port(ZAM_INPUT1);
#endif
#ifdef ZAM_INPUT2
supla_esp_gpio_enable_input_port(ZAM_INPUT2);
#endif
ETS_GPIO_INTR_ENABLE();
keys.key_num = 0;
single_key[0] = key_init_single(CFG_PORT, supla_esg_gpio_cfg_pressed, supla_esg_gpio_manual_pressed);
keys.key_num++;
#if defined(BUTTON1_PORT) && defined(RELAY1_PORT)
single_key[keys.key_num] = key_init_single(BUTTON1_PORT, NULL, supla_esg_gpio_button1_pressed);
keys.key_num++;
#endif
#if defined(BUTTON1_PORT) && defined(RELAY1_PORT)
single_key[keys.key_num] = key_init_single(BUTTON2_PORT, NULL, supla_esg_gpio_button2_pressed);
keys.key_num++;
#endif
keys.single_key = single_key;
keys.handler = supla_esp_key_intr_handler;
#ifdef RELAY_STATE_RESTORE
struct rst_info *rtc_info = system_get_rst_info();
#ifdef RELAY1_PORT
if ( rtc_info->reason == 0 ) {
supla_esp_gpio_relay1_hi(supla_esp_state.Relay1);
}
#endif
#ifdef RELAY2_PORT
if ( rtc_info->reason == 0 ) {
supla_esp_gpio_relay2_hi(supla_esp_state.Relay2);
}
#endif
#elif defined(RESET_RELAY_PORT)
#ifdef RELAY1_PORT
supla_esp_gpio_relay1_hi(RELAY_INIT_VALUE);
#endif
#ifdef RELAY2_PORT
supla_esp_gpio_relay2_hi(RELAY_INIT_VALUE);
#endif
#endif
key_init(&keys);
GPIO_PORT_POST_INIT;
supla_esp_gpio_init_time = system_get_time();
}
void ICACHE_FLASH_ATTR gpio_init() {
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2);
PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
gpio_output_set(0, BIT2, BIT2, 0);
}
// pinMode([pin], [direction])
void ICACHE_FLASH_ATTR
at_setupPinModeCmd(uint8_t id, char *pPara)
{
int result = 0, err = 0, flag = 0;
uint8 buffer[32] = {0};
pPara++; // skip '='
//get the first parameter (uint8_t)
// digit
flag = at_get_next_int_dec(&pPara, &result, &err);
// flag must be true because there are more parameters
if ((flag == FALSE) && (result > 0) )
{
at_response_error();
return;
}
uint8_t pin = result;
// Don't go any further if the pin is un-usable or non-existant
if (!pinValid(pin))
{
at_response_error();
return;
}
if (*pPara++ != ',') { // skip ','
at_response_error();
return;
}
char mode = *pPara++;
if ((mode == 'i') || (mode == 'I'))
{
if (pin == STATUS_LED_PIN)
{
wifi_status_led_uninstall();
}
PIN_FUNC_SELECT(pinMap[pin], pinFunction[pin]);
GPIO_DIS_OUTPUT(pin);
PIN_PULLUP_DIS(pinMap[pin]);
os_sprintf(buffer, "%d=INPUT\r\n", pin);
}
else if ((mode == 'o') || (mode == 'O'))
{
if (pin == STATUS_LED_PIN)
{
wifi_status_led_uninstall();
}
PIN_FUNC_SELECT(pinMap[pin], pinFunction[pin]);
GPIO_OUTPUT_SET(pin, 0);
os_sprintf(buffer, "%d=OUTPUT\r\n", pin);
}
else if ((mode == 'p') || (mode == 'P'))
{
if (pin == STATUS_LED_PIN)
{
wifi_status_led_uninstall();
}
PIN_FUNC_SELECT(pinMap[pin], pinFunction[pin]);
GPIO_DIS_OUTPUT(pin);
PIN_PULLUP_EN(pinMap[pin]);
os_sprintf(buffer, "%d=INPUT_PULLUP\r\n", pin);
}
else
{
at_response_error();
return;
}
at_port_print(buffer);
at_response_ok();
}
int ICACHE_FLASH_ATTR set_gpio_mode(unsigned pin, unsigned mode, unsigned pull)
{
if (pin >= GPIO_PIN_NUM)
return -1;
if(pin == 0) {
if(mode == GPIO_INPUT)
gpio16_input_conf();
else
gpio16_output_conf();
return 1;
}
switch(pull) {
case GPIO_PULLUP:
// PIN_PULLDWN_DIS(pin_mux[pin]);
PIN_PULLUP_EN(pin_mux[pin]);
break;
case GPIO_PULLDOWN:
PIN_PULLUP_DIS(pin_mux[pin]);
// PIN_PULLDWN_EN(pin_mux[pin]);
break;
case GPIO_FLOAT:
PIN_PULLUP_DIS(pin_mux[pin]);
// PIN_PULLDWN_DIS(pin_mux[pin]);
break;
default:
PIN_PULLUP_DIS(pin_mux[pin]);
// PIN_PULLDWN_DIS(pin_mux[pin]);
break;
}
switch(mode) {
case GPIO_INPUT:
GPIO_DIS_OUTPUT(pin_num[pin]);
break;
case GPIO_OUTPUT:
ETS_GPIO_INTR_DISABLE();
#ifdef GPIO_INTERRUPT_ENABLE
pin_int_type[pin] = GPIO_PIN_INTR_DISABLE;
#endif
PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
//disable interrupt
gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[pin]), GPIO_PIN_INTR_DISABLE);
//clear interrupt status
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(pin_num[pin]));
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin]))) & (~ GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE))); //disable open drain;
ETS_GPIO_INTR_ENABLE();
break;
#ifdef GPIO_INTERRUPT_ENABLE
case GPIO_INT:
ETS_GPIO_INTR_DISABLE();
PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
GPIO_DIS_OUTPUT(pin_num[pin]);
gpio_register_set(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE)
| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE)
| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE));
ETS_GPIO_INTR_ENABLE();
break;
#endif
default:
break;
}
return 1;
}
int platform_gpio_mode( unsigned pin, unsigned mode, unsigned pull )
{
// NODE_DBG("Function platform_gpio_mode() is called. pin_mux:%d, func:%d\n",pin_mux[pin],pin_func[pin]);
if (pin >= NUM_GPIO)
return -1;
if(pin == 0){
if(mode==PLATFORM_GPIO_INPUT)
gpio16_input_conf();
else
gpio16_output_conf();
return 1;
}
platform_pwm_close(pin); // closed from pwm module, if it is used in pwm
switch(pull){
case PLATFORM_GPIO_PULLUP:
PIN_PULLDWN_DIS(pin_mux[pin]);
PIN_PULLUP_EN(pin_mux[pin]);
break;
case PLATFORM_GPIO_PULLDOWN:
PIN_PULLUP_DIS(pin_mux[pin]);
PIN_PULLDWN_EN(pin_mux[pin]);
break;
case PLATFORM_GPIO_FLOAT:
PIN_PULLUP_DIS(pin_mux[pin]);
PIN_PULLDWN_DIS(pin_mux[pin]);
break;
default:
PIN_PULLUP_DIS(pin_mux[pin]);
PIN_PULLDWN_DIS(pin_mux[pin]);
break;
}
switch(mode){
case PLATFORM_GPIO_INPUT:
#if defined( LUA_USE_MODULES_GPIO ) && defined( GPIO_INTERRUPT_ENABLE )
lua_gpio_unref(pin); // unref the lua ref call back.
#endif
GPIO_DIS_OUTPUT(pin_num[pin]);
case PLATFORM_GPIO_OUTPUT:
ETS_GPIO_INTR_DISABLE();
#ifdef GPIO_INTERRUPT_ENABLE
pin_int_type[pin] = GPIO_PIN_INTR_DISABLE;
#endif
PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
//disable interrupt
gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[pin]), GPIO_PIN_INTR_DISABLE);
//clear interrupt status
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(pin_num[pin]));
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin]))) & (~ GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE))); //disable open drain;
ETS_GPIO_INTR_ENABLE();
break;
#ifdef GPIO_INTERRUPT_ENABLE
case PLATFORM_GPIO_INT:
ETS_GPIO_INTR_DISABLE();
PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
GPIO_DIS_OUTPUT(pin_num[pin]);
gpio_register_set(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE)
| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE)
| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE));
ETS_GPIO_INTR_ENABLE();
break;
#endif
default:
break;
}
return 1;
}
