void accm_write_stream(u8_t len, u8_t *data) { i2c_transmitinit(ADXL345_ADDR); while (i2c_busy()); PRINTFDEBUG("I2C Ready to TX(stream)\n"); i2c_transmit_n(len, data); // start tx and send conf reg while (i2c_busy()); PRINTFDEBUG("WRITE_STR %u B to 0x%02X\n", len, data[0]); }
void tlc59116_write_stream(uint8_t len, uint8_t *data) { i2c_transmitinit(TLC59116_ADDR); while(i2c_busy()); PRINTFDEBUG("I2C Ready to TX(stream)\n"); i2c_transmit_n(len, data); /* start tx and send conf reg */ while(i2c_busy()); PRINTFDEBUG("WRITE_STR %u B to 0x%02X\n", len, data[0]); }
void accm_write_reg(u8_t reg, u8_t val) { u8_t tx_buf[] = {reg, val}; i2c_transmitinit(ADXL345_ADDR); while (i2c_busy()); PRINTFDEBUG("I2C Ready to TX\n"); i2c_transmit_n(2, tx_buf); while (i2c_busy()); PRINTFDEBUG("WRITE_REG 0x%02X @ reg 0x%02X\n", val, reg); }
void tlc59116_write_reg(uint8_t reg, uint8_t val) { uint8_t tx_buf[] = { reg, val }; i2c_transmitinit(TLC59116_ADDR); while(i2c_busy()); PRINTFDEBUG("I2C Ready to TX\n"); i2c_transmit_n(2, tx_buf); while(i2c_busy()); PRINTFDEBUG("WRITE_REG 0x%02X @ reg 0x%02X\n", val, reg); }
void accm_init(void) { if(!(_ADXL345_STATUS & INITED)){ PRINTFDEBUG("ADXL345 init\n"); _ADXL345_STATUS |= INITED; accm_int1_cb = NULL; accm_int2_cb = NULL; int1_event = process_alloc_event(); int2_event = process_alloc_event(); /* Set up ports and pins for interrups. */ ADXL345_DIR &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN); ADXL345_SEL &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN); ADXL345_SEL2 &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN); /* Set up ports and pins for I2C communication */ i2c_enable(); /* set default register values. */ accm_write_stream(15, &adxl345_default_settings[0]); accm_write_stream(5, &adxl345_default_settings[15]); accm_write_reg(ADXL345_DATA_FORMAT, adxl345_default_settings[20]); accm_write_reg(ADXL345_FIFO_CTL, adxl345_default_settings[21]); process_start(&accmeter_process, NULL); /* Enable msp430 interrupts on the two interrupt pins. */ dint(); ADXL345_IES &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN); // low to high transition interrupts ADXL345_IE |= (ADXL345_INT1_PIN | ADXL345_INT2_PIN); // enable interrupts eint(); } }
ISR(USCIAB1RX, i2c_rx_interrupt) { if(UCB1STAT & UCNACKIFG) { PRINTFDEBUG("!!! NACK received in RX\n"); UCB1CTL1 |= UCTXSTP; UCB1STAT &= ~UCNACKIFG; } }
uint8_t i2c_receive_n(uint8_t byte_ctr, uint8_t *rx_buf) { rx_byte_tot = byte_ctr; rx_byte_ctr = byte_ctr; rx_buf_ptr = rx_buf; while ((UCB1CTL1 & UCTXSTT) || (UCB1STAT & UCNACKIFG)) // Slave acks address or not? PRINTFDEBUG ("____ UCTXSTT not clear OR NACK received\n"); #if I2C_RX_WITH_INTERRUPT PRINTFDEBUG(" RX Interrupts: YES \n"); // SPECIAL-CASE: Stop condition must be sent while receiving the 1st byte for 1-byte only read operations if(rx_byte_tot == 1){ // See page 537 of slau144e.pdf dint(); UCB1CTL1 |= UCTXSTT; // I2C start condition while(UCB1CTL1 & UCTXSTT) // Waiting for Start bit to clear PRINTFDEBUG ("____ STT clear wait\n"); UCB1CTL1 |= UCTXSTP; // I2C stop condition eint(); } else{ // all other cases UCB1CTL1 |= UCTXSTT; // I2C start condition } return 0; #else uint8_t n_received = 0; PRINTFDEBUG(" RX Interrupts: NO \n"); UCB1CTL1 |= UCTXSTT; // I2C start condition while (rx_byte_ctr > 0){ if (UC1IFG & UCB1RXIFG) { // Waiting for Data rx_buf[rx_byte_tot - rx_byte_ctr] = UCB1RXBUF; rx_byte_ctr--; UC1IFG &= ~UCB1RXIFG; // Clear USCI_B1 RX int flag n_received++; } } UCB1CTL1 |= UCTXSTP; // I2C stop condition return n_received; #endif }
void tlc59116_led(uint8_t led, uint8_t pwm) { if(led < 0 | led > 15) { PRINTFDEBUG("TLC59116: wrong led value."); } else { tlc59116_write_reg(led + TLC59116_PWM0, pwm); } }
static void poll_handler(void){ uint8_t ireg = 0; ireg = accm_read_reg(ADXL345_INT_SOURCE); //printf("0x%02X, 0x%02X, 0x%02X, 0x%02X\n", ireg, ireg2, int1_mask, int2_mask); /* Invoke callbacks for the corresponding interrupts */ if(ireg & int1_mask){ if(accm_int1_cb != NULL){ PRINTFDEBUG("INT1 cb invoked\n"); accm_int1_cb(ireg); } } else if(ireg & int2_mask){ if(accm_int2_cb != NULL){ PRINTFDEBUG("INT2 cb invoked\n"); accm_int2_cb(ireg); } } }
void accm_set_irq(uint8_t int1, uint8_t int2){ /* Set the corresponding interrupt mapping to INT1 or INT2 */ PRINTFDEBUG("IRQs set to INT1: 0x%02X IRQ2: 0x%02X\n", int1, int2); int1_mask = int1; int2_mask = int2; accm_write_reg(ADXL345_INT_ENABLE, (int1 | int2)); accm_write_reg(ADXL345_INT_MAP, int2); // int1 bits are zeroes in the map register so this is for both ints }
void accm_set_grange(u8_t grange){ if(grange > ADXL345_RANGE_16G) { // invalid g-range. PRINTFDEBUG("ADXL grange invalid: %u\n", grange); return; } u8_t tempreg = 0; /* preserve the previous contents of the register */ tempreg = (accm_read_reg(ADXL345_DATA_FORMAT) & 0xFC); // zero out the last two bits (grange) tempreg |= grange; // set new range accm_write_reg(ADXL345_DATA_FORMAT, tempreg); }
void accm_read_stream(u8_t reg, u8_t len, u8_t *whereto) { u8_t rtx = reg; PRINTFDEBUG("READ_STR %u B from 0x%02X\n", len, reg); /* transmit the register to start reading from */ i2c_transmitinit(ADXL345_ADDR); while (i2c_busy()); i2c_transmit_n(1, &rtx); while (i2c_busy()); /* receive the data */ i2c_receiveinit(ADXL345_ADDR); while (i2c_busy()); i2c_receive_n(len, whereto); while (i2c_busy()); }
u8_t accm_read_reg(u8_t reg) { u8_t retVal = 0; u8_t rtx = reg; PRINTFDEBUG("READ_REG 0x%02X\n", reg); /* transmit the register to read */ i2c_transmitinit(ADXL345_ADDR); while (i2c_busy()); i2c_transmit_n(1, &rtx); while (i2c_busy()); /* receive the data */ i2c_receiveinit(ADXL345_ADDR); while (i2c_busy()); i2c_receive_n(1, &retVal); while (i2c_busy()); return retVal; }
uint8_t tlc59116_read_reg(uint8_t reg) { uint8_t retVal = 0; uint8_t rtx = reg; PRINTFDEBUG("READ_REG 0x%02X\n", reg); /* transmit the register to read */ i2c_transmitinit(TLC59116_ADDR); while(i2c_busy()); i2c_transmit_n(1, &rtx); while(i2c_busy()); /* receive the data */ i2c_receiveinit(TLC59116_ADDR); while(i2c_busy()); i2c_receive_n(1, &retVal); while(i2c_busy()); return retVal; }