void fpuLoadControl(void *Variable)
{
#ifdef USEX64
PUTDST16(RecompPos, 0xB849);
PUTDST64(RecompPos, Variable);
PUTDST8(RecompPos, 0x41);
PUTDST16(RecompPos, 0x28D9);
#else
PUTDST16(RecompPos, 0x2DD9);
PUTDST32(RecompPos, Variable);
#endif
}
void fpuExchange(int Reg)
{
switch (Reg) {
case x86_ST0:
PUTDST16(RecompPos, 0xC8D9);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC9D9);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xCAD9);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xCBD9);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xCCD9);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xCDD9);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xCED9);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xCFD9);
break;
}
}
void fpuAddRegPop(int *StackPos, int x86reg)
{
*StackPos = (*StackPos + 1) & 7;
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xC0DE);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC1DE);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xC2DE);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xC3DE);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xC4DE);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xC5DE);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xC6DE);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xC7DE);
break;
}
}
void fpuDivRegPop(int x86reg)
{
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xF8DE);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xF9DE);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xFADE);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xFBDE);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xFCDE);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xFDDE);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xFEDE);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xFFDE);
break;
}
}
void fpuSubRegPop(int x86reg)
{
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xE8DE);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xE9DE);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xEADE);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xEBDE);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xECDE);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xEDDE);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xEEDE);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xEFDE);
break;
}
}
void fpuSubReg(int x86reg)
{
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xE0D8);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xE1D8);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xE2D8);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xE3D8);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xE4D8);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xE5D8);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xE6D8);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xE7D8);
break;
break;
}
}
void fpuLoadReg(int *StackPos, int Reg)
{
*StackPos = (*StackPos - 1) & 7;
switch (Reg) {
case x86_ST0:
PUTDST16(RecompPos, 0xC0D9);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC1D9);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xC2D9);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xC3D9);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xC4D9);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xC5D9);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xC6D9);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xC7D9);
break;
break;
}
}
void fpuComReg(int x86reg, uint32_t Pop)
{
int s = (Pop == 1) ? 0x0800 : 0x0000;
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xD0D8 | s);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xD1D8 | s);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xD2D8 | s);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xD3D8 | s);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xD4D8 | s);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xD5D8 | s);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xD6D8 | s);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xD7D8 | s);
break;
}
}
void fpuDivReg(int Reg)
{
switch (Reg) {
case x86_ST0:
PUTDST16(RecompPos, 0xF0D8);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xF1D8);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xF2D8);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xF3D8);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xF4D8);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xF5D8);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xF6D8);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xF7D8);
break;
}
}
void fpuAddReg(int x86reg)
{
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xC0D8);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC1D8);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xC2D8);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xC3D8);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xC4D8);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xC5D8);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xC6D8);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xC7D8);
break;
}
}
void fpuMulRegPop(int x86reg)
{
switch (x86reg & 0xf) {
case x86_ST0:
PUTDST16(RecompPos, 0xC8DE);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC9DE);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xCADE);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xCBDE);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xCCDE);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xCDDE);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xCEDE);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xCFDE);
break;
}
}
void fpuFree(int Reg)
{
switch (Reg) {
case x86_ST0:
PUTDST16(RecompPos, 0xC0DD);
break;
case x86_ST1:
PUTDST16(RecompPos, 0xC1DD);
break;
case x86_ST2:
PUTDST16(RecompPos, 0xC2DD);
break;
case x86_ST3:
PUTDST16(RecompPos, 0xC3DD);
break;
case x86_ST4:
PUTDST16(RecompPos, 0xC4DD);
break;
case x86_ST5:
PUTDST16(RecompPos, 0xC5DD);
break;
case x86_ST6:
PUTDST16(RecompPos, 0xC6DD);
break;
case x86_ST7:
PUTDST16(RecompPos, 0xC7DD);
break;
}
}
void SseMoveAlignedN64MemToReg(int sseReg, int AddrReg) {
BYTE x86Command = 0;
CPU_Message(" movaps %s, xmmword ptr [Dmem+%s]",sse_Name(sseReg), x86_Name(AddrReg));
switch (sseReg) {
case x86_XMM0: x86Command = 0x80; break;
case x86_XMM1: x86Command = 0x88; break;
case x86_XMM2: x86Command = 0x90; break;
case x86_XMM3: x86Command = 0x98; break;
case x86_XMM4: x86Command = 0xA0; break;
case x86_XMM5: x86Command = 0xA8; break;
case x86_XMM6: x86Command = 0xB0; break;
case x86_XMM7: x86Command = 0xB8; break;
}
switch (AddrReg) {
case x86_EAX: x86Command += 0x00; break;
case x86_EBX: x86Command += 0x03; break;
case x86_ECX: x86Command += 0x01; break;
case x86_EDX: x86Command += 0x02; break;
case x86_ESI: x86Command += 0x06; break;
case x86_EDI: x86Command += 0x07; break;
case x86_ESP: x86Command += 0x04; break;
case x86_EBP: x86Command += 0x05; break;
}
PUTDST16(RecompPos,0x280f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, RSPInfo.DMEM);
}
void SseShuffleReg(int Dest, int Source, BYTE Immed) {
BYTE x86Command = 0;
CPU_Message(" shufps %s, %s, %02X", sse_Name(Dest), sse_Name(Source), Immed);
switch (Dest) {
case x86_XMM0: x86Command = 0x00; break;
case x86_XMM1: x86Command = 0x08; break;
case x86_XMM2: x86Command = 0x10; break;
case x86_XMM3: x86Command = 0x18; break;
case x86_XMM4: x86Command = 0x20; break;
case x86_XMM5: x86Command = 0x28; break;
case x86_XMM6: x86Command = 0x30; break;
case x86_XMM7: x86Command = 0x38; break;
}
switch (Source) {
case x86_XMM0: x86Command += 0x00; break;
case x86_XMM1: x86Command += 0x01; break;
case x86_XMM2: x86Command += 0x02; break;
case x86_XMM3: x86Command += 0x03; break;
case x86_XMM4: x86Command += 0x04; break;
case x86_XMM5: x86Command += 0x05; break;
case x86_XMM6: x86Command += 0x06; break;
case x86_XMM7: x86Command += 0x07; break;
}
PUTDST16(RecompPos,0xC60f);
PUTDST8(RecompPos, 0xC0 | x86Command);
PUTDST8(RecompPos, Immed);
}
void SseXorRegToReg(int Dest, int Source) {
BYTE x86Command = 0;
CPU_Message(" xorps %s, %s", sse_Name(Dest), sse_Name(Source));
switch (Dest) {
case x86_XMM0: x86Command = 0x00; break;
case x86_XMM1: x86Command = 0x08; break;
case x86_XMM2: x86Command = 0x10; break;
case x86_XMM3: x86Command = 0x18; break;
case x86_XMM4: x86Command = 0x20; break;
case x86_XMM5: x86Command = 0x28; break;
case x86_XMM6: x86Command = 0x30; break;
case x86_XMM7: x86Command = 0x38; break;
}
switch (Source) {
case x86_XMM0: x86Command += 0x00; break;
case x86_XMM1: x86Command += 0x01; break;
case x86_XMM2: x86Command += 0x02; break;
case x86_XMM3: x86Command += 0x03; break;
case x86_XMM4: x86Command += 0x04; break;
case x86_XMM5: x86Command += 0x05; break;
case x86_XMM6: x86Command += 0x06; break;
case x86_XMM7: x86Command += 0x07; break;
}
PUTDST16(RecompPos,0x570f);
PUTDST8(RecompPos, 0xC0 | x86Command);
}
void MmxUnpackHighWord(int Dest, int Source) {
BYTE x86Command = 0;
CPU_Message(" punpckhwd %s, %s", mmx_Name(Dest), mmx_Name(Source));
switch (Dest) {
case x86_MM0: x86Command = 0 << 3; break;
case x86_MM1: x86Command = 1 << 3; break;
case x86_MM2: x86Command = 2 << 3; break;
case x86_MM3: x86Command = 3 << 3; break;
case x86_MM4: x86Command = 4 << 3; break;
case x86_MM5: x86Command = 5 << 3; break;
case x86_MM6: x86Command = 6 << 3; break;
case x86_MM7: x86Command = 7 << 3; break;
}
switch (Source) {
case x86_MM0: x86Command |= 0; break;
case x86_MM1: x86Command |= 1; break;
case x86_MM2: x86Command |= 2; break;
case x86_MM3: x86Command |= 3; break;
case x86_MM4: x86Command |= 4; break;
case x86_MM5: x86Command |= 5; break;
case x86_MM6: x86Command |= 6; break;
case x86_MM7: x86Command |= 7; break;
}
PUTDST16(RecompPos,0x690f);
PUTDST8(RecompPos, 0xC0 | x86Command);
}
void MmxCompareGreaterWordRegToReg(int Dest, int Source) {
BYTE x86Command = 0;
CPU_Message(" pcmpgtw %s, %s", mmx_Name(Dest), mmx_Name(Source));
switch (Dest) {
case x86_MM0: x86Command = 0 << 3; break;
case x86_MM1: x86Command = 1 << 3; break;
case x86_MM2: x86Command = 2 << 3; break;
case x86_MM3: x86Command = 3 << 3; break;
case x86_MM4: x86Command = 4 << 3; break;
case x86_MM5: x86Command = 5 << 3; break;
case x86_MM6: x86Command = 6 << 3; break;
case x86_MM7: x86Command = 7 << 3; break;
}
switch (Source) {
case x86_MM0: x86Command |= 0; break;
case x86_MM1: x86Command |= 1; break;
case x86_MM2: x86Command |= 2; break;
case x86_MM3: x86Command |= 3; break;
case x86_MM4: x86Command |= 4; break;
case x86_MM5: x86Command |= 5; break;
case x86_MM6: x86Command |= 6; break;
case x86_MM7: x86Command |= 7; break;
}
PUTDST16(RecompPos,0x650f);
PUTDST8(RecompPos, 0xC0 | x86Command);
}
void fpuLoadQword(int *StackPos, void *Variable)
{
*StackPos = (*StackPos - 1) & 7;
BreakPoint();
PUTDST16(RecompPos, 0x05DD);
PUTDST32(RecompPos, Variable);
}
void fpuLoadIntegerQword(int *StackPos, void *Variable)
{
*StackPos = (*StackPos - 1) & 7;
BreakPoint();
PUTDST16(RecompPos, 0x2DDF);
PUTDST32(RecompPos, Variable);
}
void fpuStoreIntegerDword(int *StackPos, void *Variable, uint32_t pop)
{
if (pop) {
*StackPos = (*StackPos + 1) & 7;
}
BreakPoint();
PUTDST16(RecompPos, (pop == 0) ? 0x15DB : 0x1DDB);
PUTDST32(RecompPos, Variable);
}
void fpuStoreIntegerQword(int *StackPos, void *Variable, uint32_t pop)
{
if (pop) {
*StackPos = (*StackPos + 1) & 7;
}
BreakPoint();
PUTDST16(RecompPos, (pop == 0) ? 0x35DF : 0x3DDF);
PUTDST32(RecompPos, Variable);
if (!pop) {
BreakPoint();
}
}
void MmxPmulhwRegToVariable(int Dest, void * Variable, char * VariableName) {
BYTE x86Command = 0;
CPU_Message(" pmulhw %s, [%s]", mmx_Name(Dest), VariableName);
switch (Dest) {
case x86_MM0: x86Command = 0x05; break;
case x86_MM1: x86Command = 0x0D; break;
case x86_MM2: x86Command = 0x15; break;
case x86_MM3: x86Command = 0x1D; break;
case x86_MM4: x86Command = 0x25; break;
case x86_MM5: x86Command = 0x2D; break;
case x86_MM6: x86Command = 0x35; break;
case x86_MM7: x86Command = 0x3D; break;
}
PUTDST16(RecompPos,0xe50f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, Variable);
}
void SseMoveUnalignedVariableToReg(void *Variable, char *VariableName, int sseReg) {
BYTE x86Command = 0;
CPU_Message(" movups %s, xmmword ptr [%s]",sse_Name(sseReg), VariableName);
switch (sseReg) {
case x86_XMM0: x86Command = 0x05; break;
case x86_XMM1: x86Command = 0x0D; break;
case x86_XMM2: x86Command = 0x15; break;
case x86_XMM3: x86Command = 0x1D; break;
case x86_XMM4: x86Command = 0x25; break;
case x86_XMM5: x86Command = 0x2D; break;
case x86_XMM6: x86Command = 0x35; break;
case x86_XMM7: x86Command = 0x3D; break;
}
PUTDST16(RecompPos,0x100f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, Variable);
}
void SseMoveAlignedRegToVariable(int sseReg, void *Variable, char *VariableName) {
BYTE x86Command = 0;
CPU_Message(" movaps xmmword ptr [%s], %s",VariableName, sse_Name(sseReg));
switch (sseReg) {
case x86_XMM0: x86Command = 0x05; break;
case x86_XMM1: x86Command = 0x0D; break;
case x86_XMM2: x86Command = 0x15; break;
case x86_XMM3: x86Command = 0x1D; break;
case x86_XMM4: x86Command = 0x25; break;
case x86_XMM5: x86Command = 0x2D; break;
case x86_XMM6: x86Command = 0x35; break;
case x86_XMM7: x86Command = 0x3D; break;
}
PUTDST16(RecompPos,0x290f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, Variable);
}
void MmxMoveQwordVariableToReg(int Dest, void *Variable, char *VariableName) {
BYTE x86Command = 0;
CPU_Message(" movq %s, qword ptr [%s]",mmx_Name(Dest), VariableName);
switch (Dest) {
case x86_MM0: x86Command = 0x05; break;
case x86_MM1: x86Command = 0x0D; break;
case x86_MM2: x86Command = 0x15; break;
case x86_MM3: x86Command = 0x1D; break;
case x86_MM4: x86Command = 0x25; break;
case x86_MM5: x86Command = 0x2D; break;
case x86_MM6: x86Command = 0x35; break;
case x86_MM7: x86Command = 0x3D; break;
}
PUTDST16(RecompPos,0x6f0f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, Variable);
}
void MmxPsrawImmed(int Dest, BYTE Immed) {
BYTE x86Command = 0;
CPU_Message(" psraw %s, %i", mmx_Name(Dest), Immed);
switch (Dest) {
case x86_MM0: x86Command = 0xE0; break;
case x86_MM1: x86Command = 0xE1; break;
case x86_MM2: x86Command = 0xE2; break;
case x86_MM3: x86Command = 0xE3; break;
case x86_MM4: x86Command = 0xE4; break;
case x86_MM5: x86Command = 0xE5; break;
case x86_MM6: x86Command = 0xE6; break;
case x86_MM7: x86Command = 0xE7; break;
}
PUTDST16(RecompPos,0x710f);
PUTDST8(RecompPos, x86Command);
PUTDST8(RecompPos, Immed);
}
void MmxPsllwImmed(int Dest, BYTE Immed) {
BYTE x86Command = 0;
CPU_Message(" psllw %s, %i", mmx_Name(Dest), Immed);
switch (Dest) {
case x86_MM0: x86Command = 0xF0; break;
case x86_MM1: x86Command = 0xF1; break;
case x86_MM2: x86Command = 0xF2; break;
case x86_MM3: x86Command = 0xF3; break;
case x86_MM4: x86Command = 0xF4; break;
case x86_MM5: x86Command = 0xF5; break;
case x86_MM6: x86Command = 0xF6; break;
case x86_MM7: x86Command = 0xF7; break;
}
PUTDST16(RecompPos,0x710f);
PUTDST8(RecompPos, x86Command);
PUTDST8(RecompPos, Immed);
}
void MmxShuffleMemoryToReg(int Dest, void * Variable, char * VariableName, BYTE Immed) {
BYTE x86Command = 0;
CPU_Message(" pshufw %s, [%s], %02X", mmx_Name(Dest), VariableName, Immed);
switch (Dest) {
case x86_MM0: x86Command = 0x05; break;
case x86_MM1: x86Command = 0x0D; break;
case x86_MM2: x86Command = 0x15; break;
case x86_MM3: x86Command = 0x1D; break;
case x86_MM4: x86Command = 0x25; break;
case x86_MM5: x86Command = 0x2D; break;
case x86_MM6: x86Command = 0x35; break;
case x86_MM7: x86Command = 0x3D; break;
}
PUTDST16(RecompPos,0x700f);
PUTDST8(RecompPos, x86Command);
PUTDSTPTR(RecompPos, Variable);
PUTDST8(RecompPos, Immed);
}
void fpuDivQwordReverse(void *Variable)
{
BreakPoint();
PUTDST16(RecompPos, 0x3DDC);
PUTDST32(RecompPos, Variable);
}
void fpuSubQword(void *Variable)
{
BreakPoint();
PUTDST16(RecompPos, 0x25DC);
PUTDST32(RecompPos, Variable);
}