static void ata_power_down(void)
{
if (!ata_powered) return;
ata_powered = false;
if (ceata)
{
memset(ceata_taskfile, 0, 16);
ceata_taskfile[0xf] = 0xe0;
ceata_wait_idle();
ceata_write_multiple_register(0, ceata_taskfile, 16);
sleep(HZ);
PWRCON(0) |= (1 << 9);
}
else
{
ata_wait_for_rdy(1000000);
ata_write_cbr(&ATA_PIO_DVR, 0);
ata_write_cbr(&ATA_PIO_CSD, 0xe0);
ata_wait_for_rdy(1000000);
sleep(HZ / 30);
ATA_CONTROL = 0;
while (!(ATA_CONTROL & BIT(1))) yield();
PWRCON(0) |= (1 << 5);
}
ide_power_enable(false);
}
void pcm_play_dma_init(void)
{
PWRCON(0) &= ~(1 << 4);
PWRCON(1) &= ~(1 << 7);
I2S40 = 0x110;
I2STXCON = 0xb100059;
I2SCLKCON = 1;
VIC0INTENABLE = 1 << IRQ_DMAC0;
audiohw_preinit();
}
void usb_init_device(void)
{
DCTL = 0x802; /* Soft Disconnect */
ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */
PCGCCTL = 1; /* Shut down PHY clock */
OPHYPWR = 0xF; /* PHY: Power down */
#if CONFIG_CPU==S5L8701
PWRCON |= 0x4000;
PWRCONEXT |= 0x800;
#elif CONFIG_CPU==S5L8702
PWRCON(0) |= 0x4;
PWRCON(1) |= 0x8;
#endif
}
void usb_drv_init(void)
{
/* Enable USB clock */
#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
PWRCONEXT &= ~0x800;
INTMSK |= INTMSK_USB_OTG;
#elif CONFIG_CPU==S5L8702
PWRCON(0) &= ~0x4;
PWRCON(1) &= ~0x8;
VIC0INTENABLE |= 1 << 19;
#endif
PCGCCTL = 0;
/* reset the beast */
usb_reset();
}
void usb_drv_exit(void)
{
DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
OPHYPWR = 0xF; /* PHY: Power down */
udelay(10);
ORSTCON = 7; /* Put the PHY into reset (needed to get current down) */
udelay(10);
PCGCCTL = 1; /* Shut down PHY clock */
#if CONFIG_CPU==S5L8701
PWRCON |= 0x4000;
PWRCONEXT |= 0x800;
#elif CONFIG_CPU==S5L8702
PWRCON(0) |= 0x4;
PWRCON(1) |= 0x8;
#endif
}
void usb_init_device(void)
{
unsigned int i;
for (i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
semaphore_init(&endpoints[i].complete, 1, 0);
/* Power up the core clocks to allow writing
to some registers needed to power it down */
PCGCCTL = 0;
#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
PWRCONEXT &= ~0x800;
INTMSK |= INTMSK_USB_OTG;
#elif CONFIG_CPU==S5L8702
PWRCON(0) &= ~0x4;
PWRCON(1) &= ~0x8;
VIC0INTENABLE |= 1 << 19;
#endif
usb_drv_exit();
}
void usb_drv_init(void)
{
for (unsigned i = 0; i < sizeof(endpoints)/(2*sizeof(struct ep_type)); i++)
for (unsigned dir = 0; dir < 2; dir++)
semaphore_init(&endpoints[i][dir].complete, 1, 0);
/* Enable USB clock */
#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
PWRCONEXT &= ~0x800;
INTMSK |= INTMSK_USB_OTG;
#elif CONFIG_CPU==S5L8702
PWRCON(0) &= ~0x4;
PWRCON(1) &= ~0x8;
VIC0INTENABLE |= 1 << 19;
#endif
PCGCCTL = 0;
/* reset the beast */
usb_reset();
}
static int ata_power_up(void)
{
ata_set_active();
if (ata_powered) return 0;
ide_power_enable(true);
long spinup_start = current_tick;
if (ceata)
{
PWRCON(0) &= ~(1 << 9);
SDCI_RESET = 0xa5;
sleep(HZ / 100);
*((uint32_t volatile*)0x3cf00380) = 0;
*((uint32_t volatile*)0x3cf0010c) = 0xff;
SDCI_CTRL = SDCI_CTRL_SDCIEN | SDCI_CTRL_CLK_SEL_SDCLK
| SDCI_CTRL_BIT_8 | SDCI_CTRL_BIT_14;
SDCI_CDIV = SDCI_CDIV_CLKDIV(260);
*((uint32_t volatile*)0x3cf00200) = 0xb000f;
SDCI_IRQ_MASK = SDCI_IRQ_MASK_MASK_DAT_DONE_INT | SDCI_IRQ_MASK_MASK_IOCARD_IRQ_INT;
PASS_RC(mmc_init(), 2, 0);
SDCI_CDIV = SDCI_CDIV_CLKDIV(4);
sleep(HZ / 100);
PASS_RC(ceata_init(8), 2, 1);
PASS_RC(ata_identify(ata_identify_data), 2, 2);
dma_mode = 0x44;
}
else
{
PWRCON(0) &= ~(1 << 5);
ATA_CFG = BIT(0);
sleep(HZ / 100);
ATA_CFG = 0;
sleep(HZ / 100);
ATA_SWRST = BIT(0);
sleep(HZ / 100);
ATA_SWRST = 0;
sleep(HZ / 10);
ATA_CONTROL = BIT(0);
sleep(HZ / 5);
ATA_PIO_TIME = 0x191f7;
ATA_PIO_LHR = 0;
if (!ata_swap) ATA_CFG = BIT(6);
while (!(ATA_PIO_READY & BIT(1))) yield();
PASS_RC(ata_identify(ata_identify_data), 2, 0);
uint32_t piotime = 0x11f3;
uint32_t mdmatime = 0x1c175;
uint32_t udmatime = 0x5071152;
uint32_t param = 0;
ata_dma_flags = 0;
ata_lba48 = ata_identify_data[83] & BIT(10) ? true : false;
if (ata_identify_data[53] & BIT(1))
{
if (ata_identify_data[64] & BIT(1)) piotime = 0x2072;
else if (ata_identify_data[64] & BIT(0)) piotime = 0x7083;
}
if (ata_identify_data[63] & BIT(2))
{
mdmatime = 0x5072;
param = 0x22;
}
else if (ata_identify_data[63] & BIT(1))
{
mdmatime = 0x7083;
param = 0x21;
}
if (ata_identify_data[63] & BITRANGE(0, 2))
{
ata_dma_flags = BIT(3) | BIT(10);
param |= 0x20;
}
if (ata_identify_data[53] & BIT(2))
{
if (ata_identify_data[88] & BIT(4))
{
udmatime = 0x2010a52;
param = 0x44;
}
else if (ata_identify_data[88] & BIT(3))
{
udmatime = 0x2020a52;
param = 0x43;
}
else if (ata_identify_data[88] & BIT(2))
{
udmatime = 0x3030a52;
param = 0x42;
}
else if (ata_identify_data[88] & BIT(1))
{
udmatime = 0x3050a52;
param = 0x41;
}
if (ata_identify_data[88] & BITRANGE(0, 4))
{
ata_dma_flags = BIT(2) | BIT(3) | BIT(9) | BIT(10);
param |= 0x40;
}
}
ata_dma = param ? true : false;
dma_mode = param;
PASS_RC(ata_set_feature(0xef, param), 2, 1);
if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(0x02, 0), 2, 2);
if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0x55, 0), 2, 3);
ATA_PIO_TIME = piotime;
ATA_MDMA_TIME = mdmatime;
ATA_UDMA_TIME = udmatime;
}
spinup_time = current_tick - spinup_start;
if (ata_lba48)
ata_total_sectors = ata_identify_data[100]
| (((uint64_t)ata_identify_data[101]) << 16)
| (((uint64_t)ata_identify_data[102]) << 32)
| (((uint64_t)ata_identify_data[103]) << 48);
else ata_total_sectors = ata_identify_data[60] | (((uint32_t)ata_identify_data[61]) << 16);
ata_total_sectors >>= 3;
ata_powered = true;
ata_set_active();
return 0;
}
