VOID
odm_SetRespPath_92C(
IN PADAPTER Adapter,
IN u1Byte DefaultRespPath
)
{
pPD_T pDM_PDTable = &Adapter->DM_PDTable;
RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath));
if(DefaultRespPath != pDM_PDTable->DefaultRespPath)
{
if(DefaultRespPath == 0)
{
PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15);
}
else
{
PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A);
}
}
pDM_PDTable->DefaultRespPath = DefaultRespPath;
}
VOID
ODM_Write1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u1Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W8(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_Write1Byte(
PDM_ODM_T pDM_Odm,
u32 RegAddr,
u8 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W8(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
#endif
}
VOID
odm_DynamicTxPowerRestorePowerIndex(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
u1Byte index;
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
for(index = 0; index< 6; index++)
PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]);
#elif(DM_ODM_SUPPORT_TYPE == ODM_CE)
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for(index = 0; index< 6; index++)
rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
#endif
#endif
}
u2Byte
mptbt_BtSetGeneral(
IN PADAPTER Adapter,
IN PBT_REQ_CMD pBtReq,
IN PBT_RSP_CMD pBtRsp
)
{
u1Byte h2cParaBuf[6] ={0};
u1Byte h2cParaLen=0;
u2Byte paraLen=0;
u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS;
u1Byte btOpcode;
u1Byte btOpcodeVer=0;
u1Byte setType=0;
u2Byte setParaLen=0, validParaLen=0;
u1Byte regType=0, bdAddr[6]={0}, calVal=0;
u4Byte regAddr=0, regValue=0;
pu4Byte pu4Tmp;
pu2Byte pu2Tmp;
pu1Byte pu1Tmp;
//
// check upper layer parameters
//
// check upper layer opcode version
if(pBtReq->opCodeVer != 1)
{
DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n");
pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH;
return paraLen;
}
// check upper layer parameter length
if(pBtReq->paraLength < 1)
{
DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength);
pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U;
return paraLen;
}
setParaLen = pBtReq->paraLength - 1;
setType = pBtReq->pParamStart[0];
DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen);
// check parameter first
switch(setType)
{
case BT_GSET_REG:
DBG_8192C ("[MPT], [BT_GSET_REG]\n");
validParaLen = 9;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_WRITE_REG_VALUE;
regType = pBtReq->pParamStart[1];
pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2];
regAddr = *pu4Tmp;
pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6];
regValue = *pu4Tmp;
DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n",
regType, regAddr, regValue);
if(regType >= BT_REG_MAX)
{
pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
else
{
if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) ||
((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) ||
((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) ||
((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) ||
((BT_REG_LE==regType)&&(regAddr>0xfff)) )
{
pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
}
}
break;
case BT_GSET_RESET:
DBG_8192C("[MPT], [BT_GSET_RESET]\n");
validParaLen = 0;
break;
case BT_GSET_TARGET_BD_ADDR:
DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n");
validParaLen = 6;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H;
if( (pBtReq->pParamStart[1]==0) &&
(pBtReq->pParamStart[2]==0) &&
(pBtReq->pParamStart[3]==0) &&
(pBtReq->pParamStart[4]==0) &&
(pBtReq->pParamStart[5]==0) &&
(pBtReq->pParamStart[6]==0) )
{
DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n");
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
if( (pBtReq->pParamStart[1]==0xff) &&
(pBtReq->pParamStart[2]==0xff) &&
(pBtReq->pParamStart[3]==0xff) &&
(pBtReq->pParamStart[4]==0xff) &&
(pBtReq->pParamStart[5]==0xff) &&
(pBtReq->pParamStart[6]==0xff) )
{
DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n");
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
bdAddr[0] = pBtReq->pParamStart[6];
bdAddr[1] = pBtReq->pParamStart[5];
bdAddr[2] = pBtReq->pParamStart[4];
bdAddr[3] = pBtReq->pParamStart[3];
bdAddr[4] = pBtReq->pParamStart[2];
bdAddr[5] = pBtReq->pParamStart[1];
DBG_8192C ("[MPT], target BDAddr:%s", &bdAddr[0]);
}
break;
case BT_GSET_TX_PWR_FINETUNE:
DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n");
validParaLen = 1;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION;
calVal = pBtReq->pParamStart[1];
if( (calVal<1) || (calVal>9) )
{
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
DBG_8192C ("[MPT], calVal=%d\n", calVal);
}
break;
case BT_GSET_UPDATE_BT_PATCH:
if(IS_HARDWARE_TYPE_8723AE(Adapter) && Adapter->bFWReady)
{
u1Byte i;
DBG_8192C ("[MPT], write regs for load patch\n");
//BTFwPatch8723A(Adapter);
PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x2d);
rtw_msleep_os(50);
PlatformEFIOWrite4Byte(Adapter, 0x68, 0xa005000c);
rtw_msleep_os(50);
PlatformEFIOWrite4Byte(Adapter, 0x68, 0xb005000c);
rtw_msleep_os(50);
PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x29);
for(i=0; i<12; i++)
rtw_msleep_os(100);
//#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
// BTFwPatch8723A(Adapter);
//#endif
DBG_8192C("[MPT], load BT FW Patch finished!!!\n");
}
break;
default:
{
DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType);
pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
break;
}
if(setParaLen != validParaLen)
{
DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n",
setParaLen, setType, validParaLen);
pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U;
return paraLen;
}
//
// execute lower layer opcodes
//
if(BT_GSET_REG == setType)
{
// fill h2c parameters
// here we should write reg value first then write the address, adviced by Austin
btOpcode = BT_LO_OP_WRITE_REG_VALUE;
h2cParaBuf[0] = pBtReq->pParamStart[6];
h2cParaBuf[1] = pBtReq->pParamStart[7];
h2cParaBuf[2] = pBtReq->pParamStart[8];
h2cParaLen = 3;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
// write reg address
btOpcode = BT_LO_OP_WRITE_REG_ADDR;
h2cParaBuf[0] = regType;
h2cParaBuf[1] = pBtReq->pParamStart[2];
h2cParaBuf[2] = pBtReq->pParamStart[3];
h2cParaLen = 3;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_RESET == setType)
{
btOpcode = BT_LO_OP_RESET;
h2cParaLen = 0;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_TARGET_BD_ADDR == setType)
{
// fill h2c parameters
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L;
h2cParaBuf[0] = pBtReq->pParamStart[1];
h2cParaBuf[1] = pBtReq->pParamStart[2];
h2cParaBuf[2] = pBtReq->pParamStart[3];
h2cParaLen = 3;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H;
h2cParaBuf[0] = pBtReq->pParamStart[4];
h2cParaBuf[1] = pBtReq->pParamStart[5];
h2cParaBuf[2] = pBtReq->pParamStart[6];
h2cParaLen = 3;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_TX_PWR_FINETUNE == setType)
{
// fill h2c parameters
btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION;
h2cParaBuf[0] = calVal;
h2cParaLen = 1;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
pBtRsp->status = BT_STATUS_SUCCESS;
return paraLen;
}
VOID
halTxbf8814A_DownloadNDPA(
IN PADAPTER Adapter,
IN u1Byte Idx
)
{
u1Byte u1bTmp = 0, tmpReg422 = 0;
u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
u2Byte Head_Page = 0x7FE;
BOOLEAN bSendBeacon = FALSE;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
pHalData->bFwDwRsvdPageInProgress = TRUE;
Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2);
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6));
if (tmpReg422 & BIT6) {
RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n"));
bSendBeacon = TRUE;
}
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page);
do {
/*Clear beacon valid check bit.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7));
/*download NDPA rsvd page.*/
if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
else
Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
/*check rsvd page download OK.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
count = 0;
while (!(BcnValidReg & BIT7) && count < 20) {
count++;
delay_us(10);
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2);
}
DLBcnCount++;
} while (!(BcnValidReg & BIT7) && DLBcnCount < 5);
if (!(BcnValidReg & BIT0))
RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__));
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (bSendBeacon)
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0)));
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
pHalData->bFwDwRsvdPageInProgress = FALSE;
}
static bool rtl8192_radio_on_off_checking(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
u8 u1Tmp = 0;
u8 gpio;
if (priv->pwrdown) {
u1Tmp = read_nic_byte(dev, 0x06);
gpio = u1Tmp & BIT6;
} else
#ifdef CONFIG_BT_COEXIST
if (pHalData->bt_coexist.BluetoothCoexist) {
if (pHalData->bt_coexist.BT_CoexistType == BT_2Wire) {
PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
delay_us(100);
u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
} else if ((pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
(pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4)) {
u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
if ((u4tmp & BIT17) != 0) {
PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
delay_us(50);
RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
}
u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
}
} else
#endif
{
write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);
u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);
mdelay(10);
u1Tmp = read_nic_byte(dev, GPIO_IN);
gpio = u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT;
}
#ifdef DEBUG_RFKILL
{
static u8 gpio_test;
printk("%s: gpio = %x\n", __FUNCTION__, gpio);
if(gpio_test % 5 == 0) {
gpio = 0;
} else {
gpio = 1;
}
printk("%s: gpio_test = %d, gpio = %x\n", __FUNCTION__, gpio_test++ % 20, gpio);
}
#endif
return gpio;
}
