int wolfSSL_TI_CCMInit(void)
{
if (ccm_init)
return true;
ccm_init = true;
#ifndef TI_DUMMY_BUILD
SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN |
SYSCTL_USE_PLL |
SYSCTL_CFG_VCO_480), 120000000);
if (!ROM_SysCtlPeripheralPresent(SYSCTL_PERIPH_CCM0))
return false;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_CCM0);
WAIT(ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0));
ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_CCM0);
WAIT(ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0));
#ifndef SINGLE_THREADED
if (wc_InitMutex(&TI_CCM_Mutex))
return false;
#endif
#endif /* !TI_DUMMY_BUILD */
return true;
}
/**
* Configuring the UART console
*/
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* Check the arguments */
assert((uart == 0) || (uart == 1));
/* Check to make sure the UART peripheral is present */
if(!ROM_SysCtlPeripheralPresent(g_ulUARTPeriph[uart])){
return -1;
}
int res = init_base(uart, baudrate);
if(res < 0){
return res;
}
/* save callbacks */
config[uart].rx_cb = rx_cb;
config[uart].arg = arg;
switch (uart){
#if UART_0_EN
case UART_0:
ROM_UARTTxIntModeSet(g_ulUARTBase[uart], UART_TXINT_MODE_EOT);
ROM_UARTFIFOLevelSet(g_ulUARTBase[uart], UART_FIFO_TX4_8, UART_FIFO_RX4_8);
ROM_UARTFIFOEnable(g_ulUARTBase[uart]);
/* Enable the UART interrupt */
NVIC_EnableIRQ(UART_0_IRQ_CHAN);
/* Enable RX interrupt */
UART_0_IM = UART_IM_RXIM | UART_IM_RTIM;
break;
#endif
#if UART_1_EN
case UART_1:
ROM_UARTTxIntModeSet(g_ulUARTBase[uart], UART_TXINT_MODE_EOT);
ROM_UARTFIFOLevelSet(g_ulUARTBase[uart], UART_FIFO_TX4_8, UART_FIFO_RX4_8);
ROM_UARTFIFOEnable(g_ulUARTBase[uart]);
/* Enable the UART interrupt */
NVIC_EnableIRQ(UART_1_IRQ_CHAN);
/* Enable RX interrupt */
UART_1_IM = UART_IM_RXIM | UART_IM_RTIM;
break;
#endif
}
return 0;
}
void
HardwareSerial::begin(unsigned long baud)
{
//
// Initialize the UART.
//
ROM_SysCtlPeripheralEnable(g_ulUARTInt[uartModule]);
//TODO:Add functionality for PinConfigure with variable uartModule
ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
//
// Only allow a single instance to be opened.
//
ASSERT(g_ulUARTBase[uartModule] == 0);
//
// Check to make sure the UART peripheral is present.
//
if(!ROM_SysCtlPeripheralPresent(g_ulUARTPeriph[uartModule]))
{
return;
}
ROM_SysCtlPeripheralEnable(g_ulUARTPeriph[uartModule]);
ROM_UARTConfigSetExpClk(g_ulUARTBase[uartModule], ROM_SysCtlClockGet(), baud,
(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE |
UART_CONFIG_WLEN_8));
//
// Set the UART to interrupt whenever the TX FIFO is almost empty or
// when any character is received.
//
ROM_UARTFIFOLevelSet(g_ulUARTBase[uartModule], UART_FIFO_TX1_8, UART_FIFO_RX1_8);
flushAll();
ROM_UARTIntDisable(g_ulUARTBase[uartModule], 0xFFFFFFFF);
ROM_UARTIntEnable(g_ulUARTBase[uartModule], UART_INT_RX | UART_INT_RT);
ROM_IntMasterEnable();
ROM_IntEnable(g_ulUARTInt[uartModule]);
//
// Enable the UART operation.
//
ROM_UARTEnable(g_ulUARTBase[uartModule]);
}
/**
* Configuring the UART console
*/
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
{
/* Check the arguments */
assert(uart == 0);
/* Check to make sure the UART peripheral is present */
if(!ROM_SysCtlPeripheralPresent(SYSCTL_PERIPH_UART0)){
return -1;
}
int res = uart_init_blocking(uart, baudrate);
if(res < 0){
return res;
}
/* save callbacks */
config[uart].rx_cb = rx_cb;
config[uart].tx_cb = tx_cb;
config[uart].arg = arg;
/* ulBase = g_ulUARTBase[uart]; */
switch (uart){
#if UART_0_EN
case UART_0:
NVIC_SetPriority(UART_0_IRQ_CHAN, UART_IRQ_PRIO);
ROM_UARTTxIntModeSet(UART0_BASE, UART_TXINT_MODE_EOT);
ROM_UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
ROM_UARTFIFOEnable(UART0_BASE);
/* Enable the UART interrupt */
NVIC_EnableIRQ(UART_0_IRQ_CHAN);
/* Enable RX interrupt */
UART0_IM_R = UART_IM_RXIM | UART_IM_RTIM;
break;
#endif
#if UART_1_EN
case UART_1:
NVIC_SetPriority(UART_1_IRQ_CHAN, UART_IRQ_PRIO);
/* Enable the UART interrupt */
NVIC_EnableIRQ(UART_1_IRQ_CHAN);
break;
#endif
}
return 0;
}
//*****************************************************************************
//
// Initialize the AES and CCM modules.
//
//*****************************************************************************
bool
AESInit(void)
{
uint32_t ui32Loop;
//
// Check that the CCM peripheral is present.
//
if(!ROM_SysCtlPeripheralPresent(SYSCTL_PERIPH_CCM0))
{
UARTprintf("No CCM peripheral found!\n");
//
// Return failure.
//
return(false);
}
//
// The hardware is available, enable it.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_CCM0);
//
// Wait for the peripheral to be ready.
//
ui32Loop = 0;
while(!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0))
{
//
// Increment our poll counter.
//
ui32Loop++;
if(ui32Loop > CCM_LOOP_TIMEOUT)
{
//
// Timed out, notify and spin.
//
UARTprintf("Time out on CCM ready after enable.\n");
//
// Return failure.
//
return(false);
}
}
//
// Reset the peripheral to ensure we are starting from a known condition.
//
ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_CCM0);
//
// Wait for the peripheral to be ready again.
//
ui32Loop = 0;
while(!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0))
{
//
// Increment our poll counter.
//
ui32Loop++;
if(ui32Loop > CCM_LOOP_TIMEOUT)
{
//
// Timed out, spin.
//
UARTprintf("Time out on CCM ready after reset.\n");
//
// Return failure.
//
return(false);
}
}
//
// Return initialization success.
//
return(true);
}
