static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on); static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr); #if PROCESS_SYS_EVENTS == 1 static void vmxnet3_process_events(struct vmxnet3_hw *); #endif /* * The set of PCI devices this driver supports */ #define VMWARE_PCI_VENDOR_ID 0x15AD #define VMWARE_DEV_ID_VMXNET3 0x07B0 static const struct rte_pci_id pci_id_vmxnet3_map[] = { { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) }, { .vendor_id = 0, /* sentinel */ }, }; static const struct eth_dev_ops vmxnet3_eth_dev_ops = { .dev_configure = vmxnet3_dev_configure, .dev_start = vmxnet3_dev_start, .dev_stop = vmxnet3_dev_stop, .dev_close = vmxnet3_dev_close, .promiscuous_enable = vmxnet3_dev_promiscuous_enable, .promiscuous_disable = vmxnet3_dev_promiscuous_disable, .allmulticast_enable = vmxnet3_dev_allmulticast_enable, .allmulticast_disable = vmxnet3_dev_allmulticast_disable, .link_update = vmxnet3_dev_link_update, .stats_get = vmxnet3_dev_stats_get, .mac_addr_set = vmxnet3_mac_addr_set,
#include <rte_cryptodev.h> #include <rte_cryptodev_pmd.h> #include <rte_log.h> #include <rte_pci.h> /* CPT common headers */ #include "cpt_pmd_logs.h" #include "otx_cryptodev.h" #include "otx_cryptodev_ops.h" static int otx_cryptodev_logtype; static struct rte_pci_id pci_id_cpt_table[] = { { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, CPT_81XX_PCI_VF_DEVICE_ID), }, /* sentinel */ { .device_id = 0 }, }; static void otx_cpt_logtype_init(void) { cpt_logtype = otx_cryptodev_logtype; } static int otx_cpt_pci_probe(struct rte_pci_driver *pci_drv,
* - Register a driver with a ``devinit()`` function. * * - Dump all PCI devices. * * - Check that the ``devinit()`` function is called at least once. */ int test_pci_run = 0; /* value checked by the multiprocess test */ static unsigned pci_dev_count; static int my_driver_init(struct rte_pci_driver *dr, struct rte_pci_device *dev); /* IXGBE NICS */ struct rte_pci_id my_driver_id[] = { {RTE_PCI_DEVICE(0x0001, 0x1234)}, { .vendor_id = 0, /* sentinel */ }, }; struct rte_pci_id my_driver_id2[] = { {RTE_PCI_DEVICE(0x0001, 0x4444)}, {RTE_PCI_DEVICE(0x0002, 0xabcd)}, { .vendor_id = 0, /* sentinel */ }, }; struct rte_pci_driver my_driver = { .name = "test_driver", .devinit = my_driver_init, .id_table = my_driver_id, .drv_flags = 0, };
static int pkivf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) { RTE_SET_USED(pci_drv); RTE_SET_USED(pci_dev); /* For secondary processes, the primary has done all the work */ if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; return 0; } static const struct rte_pci_id pci_pkivf_map[] = { { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_OCTEONTX_PKI_VF) }, { .vendor_id = 0, }, }; static struct rte_pci_driver pci_pkivf = { .id_table = pci_pkivf_map, .drv_flags = RTE_PCI_DRV_NEED_MAPPING, .probe = pkivf_probe, }; RTE_PMD_REGISTER_PCI(octeontx_pkivf, pci_pkivf);
#include "vnic_wq.h" #include "vnic_rq.h" #include "vnic_enet.h" #include "enic.h" int enicpmd_logtype_init; int enicpmd_logtype_flow; #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>") /* * The set of PCI devices this driver supports */ #define CISCO_PCI_VENDOR_ID 0x1137 static const struct rte_pci_id pci_id_enic_map[] = { { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, {.vendor_id = 0, /* sentinel */}, }; #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay" #define ENIC_DEVARG_ENABLE_AVX2_RX "enable-avx2-rx" #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite" RTE_INIT(enicpmd_init_log) { enicpmd_logtype_init = rte_log_register("pmd.net.enic.init"); if (enicpmd_logtype_init >= 0) rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE); enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow"); if (enicpmd_logtype_flow >= 0)
* www.qlogic.com * * See LICENSE.bnx2x_pmd for copyright and licensing details. */ #include "bnx2x.h" #include "bnx2x_rxtx.h" #include <rte_dev.h> /* * The set of PCI devices this driver supports */ #define BROADCOM_PCI_VENDOR_ID 0x14E4 static struct rte_pci_id pci_id_bnx2x_map[] = { { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57800) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57711) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57810) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57811) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57840_OBS) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57840_4_10) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57840_2_20) }, #ifdef RTE_LIBRTE_BNX2X_MF_SUPPORT { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57810_MF) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57811_MF) }, { RTE_PCI_DEVICE(BROADCOM_PCI_VENDOR_ID, CHIP_NUM_57840_MF) }, #endif { .vendor_id = 0, } }; static struct rte_pci_id pci_id_bnx2xvf_map[] = {
.queue_pair_count = NULL, /* Crypto related operations */ .session_get_size = qat_crypto_sym_get_session_private_size, .session_configure = qat_crypto_sym_configure_session, .session_initialize = qat_crypto_sym_session_init, .session_clear = qat_crypto_sym_clear_session }; /* * The set of PCI devices this driver supports */ static const struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x0443), }, { RTE_PCI_DEVICE(0x8086, 0x37c9), }, { RTE_PCI_DEVICE(0x8086, 0x19e3), }, {.device_id = 0}, }; static int crypto_qat_dev_init(__attribute__((unused)) struct rte_cryptodev_driver *crypto_drv, struct rte_cryptodev *cryptodev) { struct qat_pmd_private *internals;
uint32_t index, uint32_t vmdq __rte_unused); static void virtio_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index); static void virtio_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr); static int virtio_dev_queue_stats_mapping_set( __rte_unused struct rte_eth_dev *eth_dev, __rte_unused uint16_t queue_id, __rte_unused uint8_t stat_idx, __rte_unused uint8_t is_rx); /* * The set of PCI devices this driver supports */ static const struct rte_pci_id pci_id_virtio_map[] = { { RTE_PCI_DEVICE(VIRTIO_PCI_VENDORID, VIRTIO_PCI_DEVICEID_MIN) }, { .vendor_id = 0, /* sentinel */ }, }; struct rte_virtio_xstats_name_off { char name[RTE_ETH_XSTATS_NAME_SIZE]; unsigned offset; }; /* [rt]x_qX_ is prepended to the name string here */ static const struct rte_virtio_xstats_name_off rte_virtio_rxq_stat_strings[] = { {"good_packets", offsetof(struct virtnet_rx, stats.packets)}, {"good_bytes", offsetof(struct virtnet_rx, stats.bytes)}, {"errors", offsetof(struct virtnet_rx, stats.errors)}, {"multicast_packets", offsetof(struct virtnet_rx, stats.multicast)}, {"broadcast_packets", offsetof(struct virtnet_rx, stats.broadcast)},
PMD_DRV_LOG(INFO, "dev_id=%d socket_id=%d (%x:%x)", eventdev->data->dev_id, eventdev->data->socket_id, skel->vendor_id, skel->device_id); fail: return ret; } /* PCI based event device */ #define EVENTDEV_SKEL_VENDOR_ID 0x177d #define EVENTDEV_SKEL_PRODUCT_ID 0x0001 static const struct rte_pci_id pci_id_skeleton_map[] = { { RTE_PCI_DEVICE(EVENTDEV_SKEL_VENDOR_ID, EVENTDEV_SKEL_PRODUCT_ID) }, { .vendor_id = 0, }, }; static int event_skeleton_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) { return rte_event_pmd_pci_probe(pci_drv, pci_dev, sizeof(struct skeleton_eventdev), skeleton_eventdev_init); } static int
#define ARK_RX_MIN_QUEUE (512) #define ARK_RX_MAX_PKT_LEN ((16 * 1024) - 128) #define ARK_RX_MIN_BUFSIZE (1024) #define ARK_TX_MAX_QUEUE (4096 * 4) #define ARK_TX_MIN_QUEUE (256) static const char * const valid_arguments[] = { ARK_PKTGEN_ARG, ARK_PKTCHKR_ARG, ARK_PKTDIR_ARG, NULL }; static const struct rte_pci_id pci_id_ark_map[] = { {RTE_PCI_DEVICE(0x1d6c, 0x100d)}, {RTE_PCI_DEVICE(0x1d6c, 0x100e)}, {.vendor_id = 0, /* sentinel */ }, }; static int eth_ark_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev) { struct rte_eth_dev *eth_dev; int ret; eth_dev = rte_eth_dev_pci_allocate(pci_dev, sizeof(struct ark_adapter)); if (eth_dev == NULL) return -ENOMEM;
struct rte_eth_rss_conf *rss_conf); static int avf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); static int avf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static void avf_dev_set_default_mac_addr(struct rte_eth_dev *dev, struct ether_addr *mac_addr); static int avf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id); static int avf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id); int avf_logtype_init; int avf_logtype_driver; static const struct rte_pci_id pci_id_avf_map[] = { { RTE_PCI_DEVICE(AVF_INTEL_VENDOR_ID, AVF_DEV_ID_ADAPTIVE_VF) }, { .vendor_id = 0, /* sentinel */ }, }; static const struct eth_dev_ops avf_eth_dev_ops = { .dev_configure = avf_dev_configure, .dev_start = avf_dev_start, .dev_stop = avf_dev_stop, .dev_close = avf_dev_close, .dev_infos_get = avf_dev_info_get, .dev_supported_ptypes_get = avf_dev_supported_ptypes_get, .link_update = avf_dev_link_update, .stats_get = avf_dev_stats_get, .promiscuous_enable = avf_dev_promiscuous_enable, .promiscuous_disable = avf_dev_promiscuous_disable, .allmulticast_enable = avf_dev_allmulticast_enable,
.queue_pair_count = NULL, /* Crypto related operations */ .session_get_size = qat_crypto_sym_get_session_private_size, .session_configure = qat_crypto_sym_configure_session, .session_initialize = qat_crypto_sym_session_init, .session_clear = qat_crypto_sym_clear_session }; /* * The set of PCI devices this driver supports */ static struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x0443), }, {.device_id = 0}, }; static int crypto_qat_dev_init(__attribute__((unused)) struct rte_cryptodev_driver *crypto_drv, struct rte_cryptodev *cryptodev) { struct qat_pmd_private *internals; PMD_INIT_FUNC_TRACE(); PMD_DRV_LOG(DEBUG, "Found crypto device at %02x:%02x.%x", cryptodev->pci_dev->addr.bus, cryptodev->pci_dev->addr.devid, cryptodev->pci_dev->addr.function);