unsigned int s3c_adc_convert(void)
{
unsigned int adc_return = 0;
unsigned long data0;
unsigned long data1;
writel(readl(base_addr + S3C_ADCCON) | S3C_ADCCON_SELMUX(adc_port), base_addr + S3C_ADCCON);
udelay(10);
writel(readl(base_addr + S3C_ADCCON) | S3C_ADCCON_ENABLE_START, base_addr + S3C_ADCCON);
do {
data0 = readl(base_addr + S3C_ADCCON);
} while(!(data0 & S3C_ADCCON_ECFLG));
data1 = readl(base_addr + S3C_ADCDAT0);
if (plat_data->resolution == 12)
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK_12BIT;
else
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK;
return adc_return;
}
int s3c_adc_convert_data(void)
{
unsigned int adc_return = 0;
unsigned long data0;
unsigned long data1;
if(!ready_to_work)
{
pr_err("%s:E: tried to read ADC before ready to work\n",__func__);
return -EIO;
}
writel((readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_MUXMASK) | S3C_ADCCON_SELMUX(0),base_addr+S3C_ADCCON);
writel(readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_STDBM , base_addr+S3C_ADCCON);
writel(readl(base_addr+S3C_ADCCON) | S3C_ADCCON_READ_START , base_addr+S3C_ADCCON);
writel(readl(base_addr+S3C_ADCCON) | S3C_ADCCON_ENABLE_START , base_addr+S3C_ADCCON);
udelay(10);
data1 = readl(base_addr + S3C_ADCDAT0);
do
{
data0 = readl(base_addr + S3C_ADCCON);
}while(!(data0 & S3C_ADCCON_ECFLG));
if(plat_data->resolution == 12)
{
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK_12BIT;
}
else
{
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK;
}
writel(readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_STDBM , base_addr+S3C_ADCCON);
writel((readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_MUXMASK) | S3C_ADCCON_SELMUX(adc_port),base_addr+S3C_ADCCON);
writel(readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_READ_START , base_addr+S3C_ADCCON);
return adc_return;
}
int s3c_adc_convert(void)
{
unsigned int adc_return = 0;
unsigned long data0;
unsigned long data1;
int i = 0;
if (!ready_to_work) {
pr_err("%s:E: tried to read ADC before ready to work\n", __func__);
return -EIO;
}
writel((readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_MUXMASK)
| S3C_ADCCON_SELMUX(adc_port), base_addr+S3C_ADCCON);
/* Normal Operation Mode */
writel(readl(base_addr+S3C_ADCCON) & ~S3C_ADCCON_STDBM,
base_addr+S3C_ADCCON);
writel(readl(base_addr+S3C_ADCCON) | S3C_ADCCON_ENABLE_START,
base_addr+S3C_ADCCON);
/*
do {
// writel(readl(base_addr+S3C_ADCCON) | S3C_ADCCON_ENABLE_START,
// base_addr+S3C_ADCCON);
udelay(1000);
data0 = readl(base_addr+S3C_ADCCON);
//if (!(data0 & S3C_ADCCON_ENABLE_START) && (data0 & S3C_ADCCON_ECFLG)) {
if ((data0 & S3C_ADCCON_ECFLG)) {
data1 = readl(base_addr+S3C_ADCDAT0);
break;
} else {
pr_err("%s:E: read ADC failed(i=%d,port=%d)\n",
__func__, i, adc_port);
if (++i > 10)
goto __end__;
}
} while (1);
*/
data1 = readl(base_addr+S3C_ADCDAT0);
do
{
udelay(10);
data0 = readl(base_addr+S3C_ADCCON);
}
while(!(data0 & S3C_ADCCON_ECFLG));
// data1 = readl(base_addr+S3C_ADCDAT0);
if (plat_data->resolution == 12)
{
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK_12BIT;
} else {
adc_return = data1 & S3C_ADCDAT0_XPDATA_MASK;
}
//__end__:
/* Standby Mode */
writel(readl(base_addr+S3C_ADCCON) | S3C_ADCCON_STDBM,
base_addr+S3C_ADCCON);
return adc_return;
}