void s3c6410_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
{
unsigned int gpio;
unsigned int end;
/* Channel 1 supports 1 and 4-bit bus width */
end = S5PC1XX_GPG3(2 + width);
/* Set all the necessary GPG3 pins to special-function 2 */
for (gpio = S5PC1XX_GPG3(0); gpio < end; gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
}
/* GPG3 chip Detect */
s3c_gpio_setpull(S5PC1XX_GPG3(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PC1XX_GPG3(6), S3C_GPIO_SFN(2));
}
/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
* The emulated CS is toggled by board specific mechanism, as it can
* be either some immediate GPIO or some signal out of some other
* chip in between ... or some yet another way.
* We simply do not assume anything about CS.
*/
static int s5pc1xx_spi_cfg_gpio(struct platform_device *pdev)
{
switch (pdev->id) {
case 0:
s3c_gpio_cfgpin(S5PC1XX_GPB(0), S5PC1XX_GPB0_SPI_MISO0);
s3c_gpio_cfgpin(S5PC1XX_GPB(1), S5PC1XX_GPB1_SPI_CLK0);
s3c_gpio_cfgpin(S5PC1XX_GPB(2), S5PC1XX_GPB2_SPI_MOSI0);
s3c_gpio_setpull(S5PC1XX_GPB(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PC1XX_GPB(1), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PC1XX_GPB(2), S3C_GPIO_PULL_UP);
break;
case 1:
#if defined(CONFIG_MACH_HKDKC100)
s3c_gpio_cfgpin(S5PC1XX_GPB(4), S5PC1XX_GPB4_SPI_MISO1);
#endif
s3c_gpio_cfgpin(S5PC1XX_GPB(5), S5PC1XX_GPB5_SPI_CLK1);
s3c_gpio_cfgpin(S5PC1XX_GPB(6), S5PC1XX_GPB6_SPI_MOSI1);
#if defined(CONFIG_MACH_HKDKC100)
s3c_gpio_setpull(S5PC1XX_GPB(4), S3C_GPIO_PULL_UP);
#endif
s3c_gpio_setpull(S5PC1XX_GPB(5), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PC1XX_GPB(6), S3C_GPIO_PULL_UP);
break;
case 2:
s3c_gpio_cfgpin(S5PC1XX_GPG3(0), S5PC1XX_GPG3_0_SPI_CLK2);
s3c_gpio_cfgpin(S5PC1XX_GPG3(2), S5PC1XX_GPG3_2_SPI_MISO2);
s3c_gpio_cfgpin(S5PC1XX_GPG3(3), S5PC1XX_GPG3_3_SPI_MOSI2);
s3c_gpio_setpull(S5PC1XX_GPG3(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PC1XX_GPG3(2), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PC1XX_GPG3(3), S3C_GPIO_PULL_UP);
break;
default:
dev_err(&pdev->dev, "Invalid SPI Controller number!");
return -EINVAL;
}
return 0;
}