}
int sca3000_read_data_short(struct sca3000_state *st,
uint8_t reg_address_high,
int len)
{
struct spi_transfer xfer[2] = {
{
.len = 1,
.tx_buf = st->tx,
}, {
.len = len,
.rx_buf = st->rx,
}
};
st->tx[0] = SCA3000_READ_REG(reg_address_high);
return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
}
/**
* sca3000_reg_lock_on() test if the ctrl register lock is on
*
* Lock must be held.
**/
static int sca3000_reg_lock_on(struct sca3000_state *st)
{
int ret;
ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_STATUS, 1);
if (ret < 0)
int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val)
{
struct spi_transfer xfer = {
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.tx_buf = st->tx,
};
struct spi_message msg;
st->tx[0] = SCA3000_WRITE_REG(address);
st->tx[1] = val;
spi_message_init(&msg);
spi_message_add_tail(&xfer, &msg);
return spi_sync(st->us, &msg);
}
int sca3000_read_data(struct sca3000_state *st,
uint8_t reg_address_high,
u8 **rx_p,
int len)
{
int ret;
struct spi_message msg;
struct spi_transfer xfer = {
.bits_per_word = 8,
.len = len + 1,
.cs_change = 1,
.tx_buf = st->tx,
};
*rx_p = kmalloc(len + 1, GFP_KERNEL);
if (*rx_p == NULL) {
ret = -ENOMEM;
goto error_ret;
}
xfer.rx_buf = *rx_p;
st->tx[0] = SCA3000_READ_REG(reg_address_high);
spi_message_init(&msg);
spi_message_add_tail(&xfer, &msg);
ret = spi_sync(st->us, &msg);
if (ret) {
dev_err(get_device(&st->us->dev), "problem reading register");
goto error_free_rx;
}
return 0;
error_free_rx:
kfree(*rx_p);
error_ret:
return ret;
}
/**
* sca3000_reg_lock_on() test if the ctrl register lock is on
*
* Lock must be held.
**/
static int sca3000_reg_lock_on(struct sca3000_state *st)
{
u8 *rx;
int ret;
ret = sca3000_read_data(st, SCA3000_REG_ADDR_STATUS, &rx, 1);
if (ret < 0)
return ret;
ret = !(rx[1] & SCA3000_LOCKED);
kfree(rx);
return ret;
}
