C++ (Cpp) SOC_ACPU_SCTRL_ACPU_SC_CPU1_CTRL_ADDR примеры использования

Пример #1

Файл: pwrctrl_sleep.c Проект: XePeleato/android_kernel_huawei_venus

s32_t pwrctrl_sleep_initial ( void_t )
{

    pwrctrl_arm_init();

    /*修改掉电后重启后pc指向的位置:*/
    pwrctrl_write_reg32(IO_ADDRESS(PWRCTRL_ACPU_ASM_SPACE_ADDR), PWRCTRL_JMP_INSTRUCTION);


    /*remap to sram*/
#if defined(CHIP_BB_HI6210)/*B020 Modify*/
   pwrctrl_set_bits(IO_ADDRESS(SOC_AO_SCTRL_SC_SYS_CTRL1_ADDR(SOC_AO_SCTRL_BASE_ADDR)), \
                    BIT(SOC_AO_SCTRL_SC_SYS_CTRL1_remap_sram_aarm_START) |                                      \
                     BIT(SOC_AO_SCTRL_SC_SYS_CTRL1_remap_sram_aarm_msk_START));
#else
    pwrctrl_set_bits(IO_ADDRESS(SOC_AO_SCTRL_SC_SECURITY_CTRL2_ADDR(SOC_SC_ON_BASE_ADDR)), \
                     BIT(SOC_AO_SCTRL_SC_SECURITY_CTRL2_remap_sram_aarm_START));
#endif
#if 0/*defined(CHIP_BB_HI6210)*//*A7 feature, support hardware invalid cache*/
    pwrctrl_set_bits(IO_ADDRESS(SOC_ACPU_SCTRL_ACPU_SC_CPU0_CTRL_ADDR(SOC_ACPU_SC_BASE_ADDR)),\
                     BIT(SOC_ACPU_SCTRL_ACPU_SC_CPU0_CTRL_l1rstdisable0_START));
    pwrctrl_set_bits(IO_ADDRESS(SOC_ACPU_SCTRL_ACPU_SC_CPU1_CTRL_ADDR(SOC_ACPU_SC_BASE_ADDR)),\
                     BIT(SOC_ACPU_SCTRL_ACPU_SC_CPU1_CTRL_l1rstdisable1_START));
    pwrctrl_set_bits(IO_ADDRESS(SOC_ACPU_SCTRL_ACPU_SC_CPU2_CTRL_ADDR(SOC_ACPU_SC_BASE_ADDR)),\
                     BIT(SOC_ACPU_SCTRL_ACPU_SC_CPU2_CTRL_l1rstdisable2_START));
    pwrctrl_set_bits(IO_ADDRESS(SOC_ACPU_SCTRL_ACPU_SC_CPU3_CTRL_ADDR(SOC_ACPU_SC_BASE_ADDR)),\
                     BIT(SOC_ACPU_SCTRL_ACPU_SC_CPU3_CTRL_l1rstdisable3_START));
    pwrctrl_set_bits(IO_ADDRESS(SOC_ACPU_SCTRL_ACPU_SC_CPU_CTRL_ADDR(SOC_ACPU_SC_BASE_ADDR)),\
                     BIT(SOC_ACPU_SCTRL_ACPU_SC_CPU_CTRL_l2rstdisable_START));
#endif
    return RET_OK;
}

Пример #2

Файл: hi6xxx-hotplug.c Проект: HuaweiHonor4C/kernel_hi6210sft_mm

static int __init platform_hotplug_init(void)
{
    acpu_sctrl_base_addr = (unsigned long)HISI_VA_ADDRESS(SOC_ACPU_SCTRL_BASE_ADDR);

    g_acpu_core_sc_baseaddr[0] = SOC_ACPU_SCTRL_ACPU_SC_CPU0_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[1] = SOC_ACPU_SCTRL_ACPU_SC_CPU1_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[2] = SOC_ACPU_SCTRL_ACPU_SC_CPU2_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[3] = SOC_ACPU_SCTRL_ACPU_SC_CPU3_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[4] = SOC_ACPU_SCTRL_ACPU_SC_CPU4_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[5] = SOC_ACPU_SCTRL_ACPU_SC_CPU5_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[6] = SOC_ACPU_SCTRL_ACPU_SC_CPU6_CTRL_ADDR(acpu_sctrl_base_addr);
    g_acpu_core_sc_baseaddr[7] = SOC_ACPU_SCTRL_ACPU_SC_CPU7_CTRL_ADDR(acpu_sctrl_base_addr);
    printk("%s: %lu %lu %lu %lu\n", __FUNCTION__, g_acpu_core_sc_baseaddr[0],
        g_acpu_core_sc_baseaddr[1], g_acpu_core_sc_baseaddr[2],
        g_acpu_core_sc_baseaddr[3]);
    printk("%s: %lu %lu %lu %lu\n", __FUNCTION__, g_acpu_core_sc_baseaddr[4],
        g_acpu_core_sc_baseaddr[5], g_acpu_core_sc_baseaddr[6],
        g_acpu_core_sc_baseaddr[7]);
#ifndef CONFIG_ARM64
    register_hotcpu_notifier(&platform_cpu_up_notifier);
    register_hotcpu_notifier(&platform_cpu_down_notifier);
#endif
    return 0;
}