CS42L73_MICBPREPGABVOL, 6, 1, 1),
SOC_DOUBLE_R_SX_TLV("Input Path Digital Volume", CS42L73_IPADVOL,
CS42L73_IPBDVOL, 0, 0xA0, 0x6C, ipd_tlv),
SOC_DOUBLE_R_SX_TLV("HL Digital Playback Volume",
CS42L73_HLADVOL, CS42L73_HLBDVOL,
0, 0x34, 0xE4, hl_tlv),
SOC_SINGLE_TLV("ADC A Boost Volume",
CS42L73_ADCIPC, 2, 0x01, 1, adc_boost_tlv),
SOC_SINGLE_TLV("ADC B Boost Volume",
CS42L73_ADCIPC, 6, 0x01, 1, adc_boost_tlv),
SOC_SINGLE_SX_TLV("Speakerphone Digital Volume",
CS42L73_SPKDVOL, 0, 0x34, 0xE4, hl_tlv),
SOC_SINGLE_SX_TLV("Ear Speaker Digital Volume",
CS42L73_ESLDVOL, 0, 0x34, 0xE4, hl_tlv),
SOC_DOUBLE_R("Headphone Analog Playback Switch", CS42L73_HPAAVOL,
CS42L73_HPBAVOL, 7, 1, 1),
SOC_DOUBLE_R("LineOut Analog Playback Switch", CS42L73_LOAAVOL,
CS42L73_LOBAVOL, 7, 1, 1),
SOC_DOUBLE("Input Path Digital Switch", CS42L73_ADCIPC, 0, 4, 1, 1),
SOC_DOUBLE("HL Digital Playback Switch", CS42L73_PBDC, 0,
1, 1, 1),
SOC_SINGLE("Speakerphone Digital Playback Switch", CS42L73_PBDC, 2, 1,
1),
SOC_SINGLE("Ear Speaker Digital Playback Switch", CS42L73_PBDC, 3, 1,
CS42L52_ADCB_MIXER_VOL, 7, 1, 1),
SOC_DOUBLE_R_SX_TLV("PGA Volume", CS42L52_PGAA_CTL,
CS42L52_PGAB_CTL, 0, 0x28, 0x30, pga_tlv),
SOC_DOUBLE_R_SX_TLV("PCM Mixer Volume",
CS42L52_PCMA_MIXER_VOL, CS42L52_PCMB_MIXER_VOL,
0, 0x7f, 0x19, mix_tlv),
SOC_DOUBLE_R("PCM Mixer Switch",
CS42L52_PCMA_MIXER_VOL, CS42L52_PCMB_MIXER_VOL, 7, 1, 1),
SOC_ENUM("Beep Config", beep_config_enum),
SOC_ENUM("Beep Pitch", beep_pitch_enum),
SOC_ENUM("Beep on Time", beep_ontime_enum),
SOC_ENUM("Beep off Time", beep_offtime_enum),
SOC_SINGLE_SX_TLV("Beep Volume", CS42L52_BEEP_VOL,
0, 0x07, 0x1f, beep_tlv),
SOC_SINGLE("Beep Mixer Switch", CS42L52_BEEP_TONE_CTL, 5, 1, 1),
SOC_ENUM("Beep Treble Corner Freq", beep_treble_enum),
SOC_ENUM("Beep Bass Corner Freq", beep_bass_enum),
SOC_SINGLE("Tone Control Switch", CS42L52_BEEP_TONE_CTL, 0, 1, 1),
SOC_SINGLE_TLV("Treble Gain Volume",
CS42L52_TONE_CTL, 4, 15, 1, hl_tlv),
SOC_SINGLE_TLV("Bass Gain Volume",
CS42L52_TONE_CTL, 0, 15, 1, hl_tlv),
/* Limiter */
SOC_SINGLE_TLV("Limiter Max Threshold Volume",
CS42L52_LIMITER_CTL1, 5, 7, 0, limiter_tlv),
SOC_SINGLE_TLV("Limiter Cushion Threshold Volume",
CS42L52_LIMITER_CTL1, 2, 7, 0, limiter_tlv),
CS35L34_MUTE, CS35L34_MUTE);
usleep_range(5000, 5100);
break;
default:
pr_err("Invalid event = 0x%x\n", event);
}
return 0;
}
static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0);
static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 300, 100, 0);
static const struct snd_kcontrol_new cs35l34_snd_controls[] = {
SOC_SINGLE_SX_TLV("Digital Volume", CS35L34_AMP_DIG_VOL,
0, 0x34, 0xE4, dig_vol_tlv),
SOC_SINGLE_TLV("Amp Gain Volume", CS35L34_AMP_ANLG_GAIN_CTL,
0, 0xF, 0, amp_gain_tlv),
};
static int cs35l34_mclk_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct cs35l34_private *priv = snd_soc_codec_get_drvdata(codec);
int ret, i;
unsigned int reg;
switch (event) {
case SND_SOC_DAPM_PRE_PMD:
case CS35L33_RX_ALIVE:
case CS35L33_BST_CTL4:
return true;
default:
return false;
}
}
static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 100, 0);
static DECLARE_TLV_DB_SCALE(dac_tlv, -10200, 50, 0);
static const struct snd_kcontrol_new cs35l33_snd_controls[] = {
SOC_SINGLE_TLV("SPK Amp Volume", CS35L33_AMP_CTL,
4, 0x09, 0, classd_ctl_tlv),
SOC_SINGLE_SX_TLV("DAC Volume", CS35L33_DIG_VOL_CTL,
0, 0x34, 0xE4, dac_tlv),
};
static int cs35l33_spkrdrv_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct cs35l33_private *priv = snd_soc_component_get_drvdata(component);
switch (event) {
case SND_SOC_DAPM_POST_PMU:
if (!priv->amp_cal) {
usleep_range(8000, 9000);
priv->amp_cal = true;
regmap_update_bits(priv->regmap, CS35L33_CLASSD_CTL,
CS35L33_AMP_CAL, 0);
2, 0, pga_preamp_tlv),
SOC_DOUBLE_R_TLV("ADC2 Preamplifier Volume", CS53L30_ADC2A_AFE_CTL,
CS53L30_ADC2B_AFE_CTL, CS53L30_ADCxy_PREAMP_SHIFT,
2, 0, pga_preamp_tlv),
SOC_ENUM("Input 1 Channel Select", input1_sel_enum),
SOC_ENUM("Input 2 Channel Select", input2_sel_enum),
SOC_ENUM("ADC1 HPF Select", adc1_hpf_enum),
SOC_ENUM("ADC2 HPF Select", adc2_hpf_enum),
SOC_ENUM("ADC1 NG Threshold", adc1_ng_thres_enum),
SOC_ENUM("ADC2 NG Threshold", adc2_ng_thres_enum),
SOC_ENUM("ADC1 NG Delay", adc1_ng_delay_enum),
SOC_ENUM("ADC2 NG Delay", adc2_ng_delay_enum),
SOC_SINGLE_SX_TLV("ADC1A PGA Volume",
CS53L30_ADC1A_AFE_CTL, 0, 0x34, 0x18, pga_tlv),
SOC_SINGLE_SX_TLV("ADC1B PGA Volume",
CS53L30_ADC1B_AFE_CTL, 0, 0x34, 0x18, pga_tlv),
SOC_SINGLE_SX_TLV("ADC2A PGA Volume",
CS53L30_ADC2A_AFE_CTL, 0, 0x34, 0x18, pga_tlv),
SOC_SINGLE_SX_TLV("ADC2B PGA Volume",
CS53L30_ADC2B_AFE_CTL, 0, 0x34, 0x18, pga_tlv),
SOC_SINGLE_SX_TLV("ADC1A Digital Volume",
CS53L30_ADC1A_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv),
SOC_SINGLE_SX_TLV("ADC1B Digital Volume",
CS53L30_ADC1B_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv),
SOC_SINGLE_SX_TLV("ADC2A Digital Volume",
CS53L30_ADC2A_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv),
SOC_SINGLE_SX_TLV("ADC2B Digital Volume",
CS53L30_ADC2B_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv),
