/**
This function adjusts the period of timer interrupts to the value specified
by TimerPeriod. If the timer period is updated, then the selected timer
period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
If an error occurs while attempting to update the timer period, then the
timer hardware will be put back in its state prior to this call, and
EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
is disabled. This is not the same as disabling the CPU's interrupts.
Instead, it must either turn off the timer hardware, or it must adjust the
interrupt controller so that a CPU interrupt is not generated when the timer
interrupt fires.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
the timer hardware is not programmable, then EFI_UNSUPPORTED is
returned. If the timer is programmable, then the timer period
will be rounded up to the nearest timer period that is supported
by the timer hardware. If TimerPeriod is set to 0, then the
timer interrupts will be disabled.
@retval EFI_SUCCESS The timer period was changed.
@retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
@retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
**/
STATIC
EFI_STATUS
EFIAPI
SP805SetTimerPeriod (
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
EFI_STATUS Status;
UINT64 Ticks64bit;
SP805Unlock ();
Status = EFI_SUCCESS;
if (TimerPeriod == 0) {
// This is a watchdog stop request
SP805Stop ();
} else {
// Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
// The SP805 will count down to zero and generate an interrupt.
//
// WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz);
//
// i.e.:
//
// WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 10 MHz ;
Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz));
Ticks64bit = DivU64x32 (Ticks64bit, 10 * 1000 * 1000);
// The registers in the SP805 are only 32 bits
if (Ticks64bit > MAX_UINT32) {
// We could load the watchdog with the maximum supported value but
// if a smaller value was requested, this could have the watchdog
// triggering before it was intended.
// Better generate an error to let the caller know.
Status = EFI_DEVICE_ERROR;
goto EXIT;
}
// Update the watchdog with a 32-bit value.
MmioWrite32 (SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
// Start the watchdog
SP805Start ();
}
mTimerPeriod = TimerPeriod;
EXIT:
// Ensure the watchdog is locked before exiting.
SP805Lock ();
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
This function adjusts the period of timer interrupts to the value specified
by TimerPeriod. If the timer period is updated, then the selected timer
period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
If an error occurs while attempting to update the timer period, then the
timer hardware will be put back in its state prior to this call, and
EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
is disabled. This is not the same as disabling the CPU's interrupts.
Instead, it must either turn off the timer hardware, or it must adjust the
interrupt controller so that a CPU interrupt is not generated when the timer
interrupt fires.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
the timer hardware is not programmable, then EFI_UNSUPPORTED is
returned. If the timer is programmable, then the timer period
will be rounded up to the nearest timer period that is supported
by the timer hardware. If TimerPeriod is set to 0, then the
timer interrupts will be disabled.
@retval EFI_SUCCESS The timer period was changed.
@retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
@retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
**/
EFI_STATUS
EFIAPI
SP805SetTimerPeriod (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
EFI_STATUS Status = EFI_SUCCESS;
UINT64 Ticks64bit;
SP805Unlock();
if( TimerPeriod == 0 ) {
// This is a watchdog stop request
SP805Stop();
goto EXIT;
} else {
// Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
// The SP805 will count down to ZERO once, generate an interrupt and
// then it will again reload the initial value and start again.
// On the second time when it reaches ZERO, it will actually reset the board.
// Therefore, we need to load half the required delay.
//
// WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
//
// i.e.:
//
// WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000);
// The registers in the SP805 are only 32 bits
if(Ticks64bit > (UINT64)0xFFFFFFFF) {
// We could load the watchdog with the maximum supported value but
// if a smaller value was requested, this could have the watchdog
// triggering before it was intended.
// Better generate an error to let the caller know.
Status = EFI_DEVICE_ERROR;
goto EXIT;
}
// Update the watchdog with a 32-bit value.
MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
// Start the watchdog
SP805Start();
}
EXIT:
// Ensure the watchdog is locked before exiting.
SP805Lock();
return Status;
}
