// spiClock is 0 to 6, relecting AVR clock dividers 2,4,8,16,32,64,128
// Due can only go as slow as AVR divider 32 -- slowest Due clock is 329,412 Hz
void HAL::spiInit(uint8_t spiClock)
{
#if MOTHERBOARD == 500 || MOTHERBOARD == 501
if (spiInitMaded == false)
{
#endif
if (spiClock > 4) spiClock = 1;
#if MOTHERBOARD == 500 || MOTHERBOARD == 501
// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiClock]) |
SPI_CSR_DLYBCT(1));
// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiClock]) |
SPI_CSR_DLYBCT(1));
#endif// MOTHERBOARD==500 || MOTHERBOARD==501
// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiClock]) |
SPI_CSR_DLYBCT(1));
SPI_Enable(SPI0);
#if MOTHERBOARD == 500 || MOTHERBOARD == 501
spiInitMaded = true;
}
#endif
}
/**
* \brief Initialize SPI as slave
*/
static void SpiSlaveInitialize( void )
{
uint32_t i ;
printf("-I- Initialize SPI as slave ...\n\r");
/* Configures a SPI peripheral */
SPI_Configure(SPI_SLAVE_BASE, ID_SPI, 0);
SPI_ConfigureNPCS(SPI_SLAVE_BASE, 0 , 0);
/* Disable the RX and TX PDC transfer requests */
SPI_PdcDisableTx(SPI_MASTER_BASE);
SPI_PdcDisableRx(SPI_MASTER_BASE);
/* Enables a SPI peripheral. */
SPI_Enable(SPI_SLAVE_BASE);
/* Reset status */
spiStatus.totalNumBlocks = 0;
spiStatus.totalNumCommands = 0;
for ( i = 0; i < NB_STATUS_CMD; i++ )
{
spiStatus.cmdList[i] = 0 ;
}
/* Start waiting command */
spiState = SLAVE_STATE_IDLE;
spiCmd = RC_SYN;
SpiSlaveTransfer(&spiCmd, 4, 0, 0);
}
void SPIClass::setDataMode(uint8_t _pin, uint8_t _mode) {
uint32_t ch = BOARD_PIN_TO_SPI_CHANNEL(_pin);
mode[ch] = _mode | SPI_CSR_CSAAT;
// SPI_CSR_DLYBCT(1) keeps CS enabled for 32 MCLK after a completed
// transfer. Some device needs that for working properly. //TODO: See if this is needed for Flutter
SPI_ConfigureNPCS(spi, ch, mode[ch] | SPI_CSR_SCBR(divider[ch]) | SPI_CSR_DLYBCT(1));
}
static void ILI9488_InitInterface(void)
{
PIO_Configure(ILI9488_Reset, PIO_LISTSIZE(ILI9488_Reset));
PIO_Configure(spi_pins, PIO_LISTSIZE(spi_pins));
PIO_Configure(ILI9488_Pwm, PIO_LISTSIZE(ILI9488_Pwm));
/* Enable PWM peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
/* Set clock A and clock B */
// set for 14.11 KHz for CABC control
// mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) |
// PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110));
PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK);
/* Configure PWM channel 1 for LED0 */
PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD);
PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA,0,PWM_CMR_CPOL);
PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16);
PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8);
PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD);
SPI_Configure(ILI9488, ILI9488_ID, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( ILI9488_cs )));
SPI_ConfigureNPCS( ILI9488, ILI9488_cs,
SPI_CSR_CPOL | SPI_CSR_BITS_9_BIT |
SPI_DLYBS(100, BOARD_MCK) | SPI_DLYBCT(100, BOARD_MCK) |
SPI_SCBR( 35000000, BOARD_MCK) ) ;
SPI_Enable(ILI9488);
}
//------------------------------------------------------------------------------
void Mez_TR_init(mezonin *MezStruct)
{
uint32_t CS_configuration;
Mezonin_TR[MezStruct->Mez_ID - 1].Channel.flDAC = 0;
CS_configuration = AT91C_SPI_BITS_8 | 0x30 << 8 | 0<<24| 0<<16 | AT91C_SPI_NCPHA;
SPI_ConfigureNPCS(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, CS_configuration);
if (xSPISemaphore != NULL) {
if (xSemaphoreTake( xSPISemaphore, portMAX_DELAY ) == pdTRUE) {
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0b01010101);//control register
SPI_Read(AT91C_BASE_SPI0);
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0b10000);//output enable
SPI_Read(AT91C_BASE_SPI0);
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0b110);// от 0 до 20 mA
SPI_Read(AT91C_BASE_SPI0);
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0b1);//data register
SPI_Read(AT91C_BASE_SPI0);
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0);
SPI_Read(AT91C_BASE_SPI0);
SPI_Write(AT91C_BASE_SPI0, MezStruct->Mez_ID-1, 0);
SPI_Read(AT91C_BASE_SPI0);
xSemaphoreGive(xSPISemaphore);
}
}
}
/**
* \brief Initialization of the SPI for communication with ADS7843 component.
*/
extern void ADS7843_Initialize( void )
{
volatile uint32_t uDummy;
/* Configure pins */
PIO_Configure(pinsSPI, PIO_LISTSIZE(pinsSPI));
PIO_Configure(pinBusy, PIO_LISTSIZE(pinBusy));
SPI_Configure(BOARD_TSC_SPI_BASE,
BOARD_TSC_SPI_ID,
SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS(BOARD_TSC_NPCS) /* Value of the SPI configuration register. */
);
SPI_ConfigureNPCS(BOARD_TSC_SPI_BASE, BOARD_TSC_NPCS,
SPI_CSR_NCPHA | SPI_CSR_DLYBS(DELAY_BEFORE_SPCK) |
SPI_CSR_DLYBCT(DELAY_BETWEEN_CONS_COM) | SPI_CSR_SCBR(0xC8) );
SPI_Enable(BOARD_TSC_SPI_BASE);
for (uDummy=0; uDummy<100000; uDummy++);
uDummy = REG_SPI_SR;
uDummy = REG_SPI_RDR;
SendCommand(CMD_ENABLE_PENIRQ);
}
/**
* \brief ILI9488 Hardware Initialization for SPI/SMC LCD.
*/
static void _ILI9488_Spi_HW_Initialize(void)
{
/* Pin configurations */
PIO_Configure(&lcd_spi_reset_pin, 1);
PIO_Configure(&lcd_spi_cds_pin, 1);
PIO_Configure(lcd_pins, PIO_LISTSIZE(lcd_pins));
PIO_Configure(&lcd_spi_pwm_pin, 1);
/* Enable PWM peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
PMC_EnablePeripheral(ID_SPI0);
/* Set clock A and clock B */
// set for 14.11 KHz for CABC control
//mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) |
//PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110));
PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK);
/* Configure PWM channel 1 for LED0 */
PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD);
PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA, 0,
PWM_CMR_CPOL);
PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16);
PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8);
PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD);
SPI_Configure(ILI9488_SPI, ID_SPI0, (SPI_MR_MSTR | SPI_MR_MODFDIS
| SPI_PCS(SMC_EBI_LCD_CS)));
SPI_ConfigureNPCS(ILI9488_SPI,
SMC_EBI_LCD_CS,
SPI_CSR_CPOL | SPI_CSR_BITS_8_BIT | SPI_DLYBS(6, BOARD_MCK)
| SPI_DLYBCT(100, BOARD_MCK) | SPI_SCBR(20000000, BOARD_MCK));
SPI_Enable(ILI9488_SPI);
}
/**
* \brief Configures spi in spi_mode with respect to state
*/
static void _ConfigureSpi( uint8_t state )
{
uint32_t mode = SPI_MR_MSTR ;
uint32_t csr0 ;
/* spi in slave mode */
if ( state == STATE_UM_SS )
{
mode &= (uint32_t) (~(SPI_MR_MSTR)) ;
}
csr0 = SPI_CSR_BITS_8_BIT | SPI_CSR_DLYBS(0xFF) ;
/* spi clock */
if ( state == STATE_US_SM )
{
csr0 |= ((BOARD_MCK/USART_SPI_CLK) << 8 ) ;
}
/* configure SPI mode */
SPI_Configure( SPI, ID_SPI, mode ) ;
NVIC_EnableIRQ( SPI_IRQn ) ;
/* configure SPI csr0*/
SPI_ConfigureNPCS( SPI, 0, csr0 ) ;
SPI_Enable( SPI ) ;
}
void ledsInit(void){
uint8_t i;
//init SPI
SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCS(0));
SPI_ConfigureNPCS(SPI0, 0 , SPI_CSR_NCPHA | SPI_CSR_BITS_12_BIT | SPI_CSR_SCBR(3) | SPI_CSR_DLYBS(2) | SPI_CSR_DLYBCT(0)); //30MHz spi speed
SPI_Enable(SPI0);
SPI0->SPI_IDR = 0xFFFFFFFF;
NVIC_EnableIRQ(SPI0_IRQn);
//init pins: SPI
gpioSetFun(MISO, GPIO_FUNC_A);
gpioSetFun(MOSI, GPIO_FUNC_A);
gpioSetFun(SCLK, GPIO_FUNC_A);
//init pins: debug LED
gpioSetFun(DBGLED, GPIO_FUNC_GPIO);
gpioSetDir(DBGLED, 0);
gpioSetVal(DBGLED, 0);
//init pins: latch
gpioSetFun(XLAT, GPIO_FUNC_GPIO);
gpioSetDir(XLAT, 0);
gpioSetVal(XLAT, 0);
//init pins: blanking
for(i = 0; i < sizeof(blanks); i++){
gpioSetFun(blanks[i], GPIO_FUNC_GPIO);
gpioSetDir(blanks[i], 0);
gpioSetVal(blanks[i], 1);
}
periodicAdd(ledUpdate, 0, 4);
}
void SPIClass::setClockDivider(uint8_t _pin, uint8_t _divider) {
uint32_t ch = BOARD_PIN_TO_SPI_CHANNEL(_pin);
divider[ch] = _divider;
// SPI_CSR_DLYBCT(1) keeps CS enabled for 32 MCLK after a completed
// transfer. Some device needs that for working properly.
SPI_ConfigureNPCS(spi, ch, mode[ch] | SPI_CSR_SCBR(divider[ch]) | SPI_CSR_DLYBCT(1));
}
void hwspi0_init_default(void){
pmc_enable_periph_clk(ID_SPI0);
pmc_enable_periph_clk(ID_PIOA);
PIO_Configure(PIOA, PIO_PERIPH_A, PIO_MOSI, PIO_DEFAULT);
PIO_Configure(PIOA, PIO_PERIPH_A, PIO_MISO, PIO_DEFAULT);
PIO_Configure(PIOA, PIO_PERIPH_A, PIO_SCK, PIO_DEFAULT);
SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_PS | SPI_MR_MODFDIS);
SPI_Enable(SPI0);
SPI_ConfigureNPCS(SPI0, 0, SPI_CSR_CSAAT | SPI_MODE0 | SPI_CSR_SCBR(SPI_CLOCK_DIV16) | SPI_CSR_DLYBCT(1));
SPI_ConfigureNPCS(SPI0, 1, SPI_CSR_CSAAT | SPI_MODE0 | SPI_CSR_SCBR(SPI_CLOCK_DIV16) | SPI_CSR_DLYBCT(1));
SPI_ConfigureNPCS(SPI0, 2, SPI_CSR_CSAAT | SPI_MODE0 | SPI_CSR_SCBR(SPI_CLOCK_DIV16) | SPI_CSR_DLYBCT(1));
SPI_ConfigureNPCS(SPI0, 3, SPI_CSR_CSAAT | SPI_MODE0 | SPI_CSR_SCBR(SPI_CLOCK_DIV16) | SPI_CSR_DLYBCT(1));
//SPI_ConfigureNPCS(SPI0, 0, SPI_BITS_8 | SCBR);
}
// spiClock is 0 to 6, relecting AVR clock dividers 2,4,8,16,32,64,128
// Due can only go as slow as AVR divider 32 -- slowest Due clock is 329,412 Hz
void HAL::spiInit(uint8_t spiClock)
{
if(spiClock>4) spiClock = 1;
// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiClock]) |
SPI_CSR_DLYBCT(1));
SPI_Enable(SPI0);
}
/**
* \brief Interrupt handler for the SPI slave.
*/
void SPI_IrqHandler( void )
{
uint32_t status;
uint8_t startNew = 0;
status = SPI_GetStatus( SPI_SLAVE_BASE ) ;
if ( status & SPI_SR_NSSR )
{
if ( status & SPI_SR_RXBUFF )
{
/* Disable the RX and TX PDC transfer requests */
SPI_PdcDisableTx( SPI_SLAVE_BASE ) ;
SPI_PdcDisableRx( SPI_SLAVE_BASE ) ;
}
if ( status & SPI_IDR_ENDRX )
{
SPI_DisableIt( SPI_SLAVE_BASE, SPI_IDR_ENDRX ) ;
}
switch ( status & (SPI_SR_RXBUFF | SPI_SR_ENDRX) )
{
case (SPI_SR_RXBUFF | SPI_SR_ENDRX):
case (SPI_SR_RXBUFF):
SpiSlaveCommandProcess() ;
startNew = 1 ;
break ;
/* Maybe command break data transfer, start new */
case SPI_SR_ENDRX:
{
/* Command breaks data transfer */
SPI_PdcDisableTx( SPI_SLAVE_BASE ) ;
SPI_PdcDisableRx( SPI_SLAVE_BASE ) ;
SPI_Configure( SPI_SLAVE_BASE, ID_SPI, 0 ) ;
SPI_ConfigureNPCS( SPI_SLAVE_BASE, 0 , 0 ) ;
startNew = 1 ;
}
break;
default:
break;
}
if ( startNew )
{
if ( spiCmd != CMD_END )
{
spiStatus.cmdList[spiStatus.totalNumCommands] = spiCmd;
spiStatus.totalNumCommands ++;
}
SpiSlaveNewCommand();
}
}
}
/**
* \brief Configures spi in slave mode.
*/
static void _ConfigureSpiSlave( void )
{
/* Configure SPI slave mode */
SPI_Configure(SPI, ID_SPI, SPI_PCS(0));
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn ,1);
NVIC_EnableIRQ(SPI_IRQn);
SPI_DisableIt(SPI, 0xffffffff);
SPI_ConfigureNPCS(SPI, 0, 0);
}
/**
* \brief Configures the parameters for the device corresponding to the cs value.
*
* \param pSpid Pointer to a Spid instance.
* \param cs number corresponding to the SPI chip select.
* \param csr SPI_CSR value to setup.
*/
void SPID_ConfigureCS( Spid *pSpid,
uint32_t dwCS,
uint32_t dwCsr)
{
Spi *pSpiHw = pSpid->pSpiHw;
/* Enable the SPI Peripheral */
PMC_EnablePeripheral (pSpid->spiId );
/* Configure SPI Chip Select Register */
SPI_ConfigureNPCS( pSpiHw, dwCS, dwCsr );
/* Disable the SPI Peripheral */
PMC_DisablePeripheral (pSpid->spiId );
}
/**
* \brief Initialize SPI as master
*/
static void SpiMasterInitialize( void )
{
printf( "-I- Configure SPI as master\n\r" ) ;
/* Master mode */
SPI_Configure( SPI_MASTER_BASE, ID_SPI, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( 0 ) ) ;
SPI_ConfigureNPCS( SPI_MASTER_BASE, 0, SPI_DLYBCT( 100000, BOARD_MCK ) | SPI_DLYBS(100000, BOARD_MCK) | SPI_SCBR( spiClock, BOARD_MCK) ) ;
/* Disable the RX and TX PDC transfer requests */
SPI_PdcDisableTx( SPI_MASTER_BASE ) ;
SPI_PdcDisableRx( SPI_MASTER_BASE ) ;
/* Enables a SPI peripheral. */
SPI_Enable( SPI_MASTER_BASE ) ;
}
/**
* \brief Configures spi in master mode.
*/
static void _ConfigureSpiMaster(void)
{
/* Configure SPI master mode */
SPI_Configure(SPI, ID_SPI, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS(1)));
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn ,1);
NVIC_EnableIRQ(SPI_IRQn);
SPI_DisableIt(SPI, 0xffffffff);
SPI_ConfigureNPCS(SPI, 1,
SPI_DLYBCT( 100, BOARD_MCK ) |
SPI_DLYBS(100, BOARD_MCK) |
SPI_SCBR( spiClock, BOARD_MCK) |
SPI_CSR_BITS_8_BIT);
}
void spi_stack_master_init(void) {
Pin spi_master_pins[] = {PINS_SPI};
PIO_Configure(spi_master_pins, PIO_LISTSIZE(spi_master_pins));
#ifndef CONSOLE_USART_USE_UART1
if(master_get_hardware_version() > 10) {
Pin spi_select_7_20 = PIN_SPI_SELECT_MASTER_7_20;
memcpy(&spi_select_master[7], &spi_select_7_20, sizeof(Pin));
} else {
Pin spi_select_7_10 = PIN_SPI_SELECT_MASTER_7_10;
memcpy(&spi_select_master[7], &spi_select_7_10, sizeof(Pin));
}
PIO_Configure(spi_select_master, 8);
#else
PIO_Configure(spi_select_master, 7);
#endif
// Master mode configuration
SPI_Configure(SPI,
ID_SPI,
// Master mode
SPI_MR_MSTR |
// Mode fault detection disabled
SPI_MR_MODFDIS |
// Wait until receive register empty before read
SPI_MR_WDRBT |
// Chip select number
SPI_PCS(0) |
// Delay between chip selects
SPI_DLYBCS(SPI_DELAY_BETWEEN_CHIP_SELECT, BOARD_MCK));
// Configure slave select
SPI_ConfigureNPCS(SPI,
// slave select num
0,
// Delay between consecutive transfers
SPI_DLYBCT(SPI_DELAY_BETWEEN_TRANSFER, BOARD_MCK) |
// Delay before first SPCK
SPI_DLYBS(SPI_DELAY_BEFORE_FIRST_SPI_CLOCK, BOARD_MCK) |
// SPI baud rate
SPI_SCBR(SPI_CLOCK, BOARD_MCK));
// Enable SPI peripheral.
SPI_Enable(SPI);
}
// Initialises the SPI controller on the at91.
void Init_SPI(void)
{
SPI_Configure(AT91C_BASE_SPI0,
AT91C_ID_SPI0,
AT91C_SPI_MSTR |
AT91C_SPI_PS_FIXED |
AT91C_SPI_MODFDIS |
SPI_PCS(0)
);
//Configure SPI Chip Select Register.
SPI_ConfigureNPCS(AT91C_BASE_SPI0,
0, // NPCS0
AT91C_SPI_NCPHA | // Mode 0 (CPOL=0,CPHA=0)
(128 << 8) | // SCBR: SPCK=MCK/SCBR //8 or 64
(0 << 16) | // DLYBS: Delay from NPCS to SPCK in MCK cycles
(0 << 24) | // DLYBCT: Delay between consec xfers
AT91C_SPI_BITS_8 // 8-data bits
);
SPI_Enable(AT91C_BASE_SPI0);
}
void spi_stack_slave_init(void) {
PIO_Configure(spi_slave_pins, PIO_LISTSIZE(spi_slave_pins));
// Configure SPI interrupts for Slave
NVIC_DisableIRQ(SPI_IRQn);
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn, PRIORITY_STACK_SLAVE_SPI);
NVIC_EnableIRQ(SPI_IRQn);
// Configure SPI peripheral
SPI_Configure(SPI, ID_SPI, 0);
SPI_ConfigureNPCS(SPI, 0 , 0);
// Disable RX and TX DMA transfer requests
SPI_PdcDisableTx(SPI);
SPI_PdcDisableRx(SPI);
// Enable SPI peripheral
SPI_Enable(SPI);
// Call interrupt on data in rx buffer
SPI_EnableIt(SPI, SPI_IER_RDRF);
}
void spi_stack_master_init(void) {
// Set starting sequence number to something that slave does not expect
// (default for slave is 0)
//spi_stack_master_seq = 1;
for(uint8_t i = 0; i < SPI_ADDRESS_MAX; i++) {
slave_status[i] = SLAVE_STATUS_ABSENT;
}
Pin spi_master_pins[] = {PINS_SPI};
PIO_Configure(spi_master_pins, PIO_LISTSIZE(spi_master_pins));
#ifndef CONSOLE_USART_USE_UART1
if(master_get_hardware_version() > 10) {
Pin spi_select_7_20 = PIN_SPI_SELECT_MASTER_7_20;
memcpy(&spi_select_master[7], &spi_select_7_20, sizeof(Pin));
} else {
Pin spi_select_7_10 = PIN_SPI_SELECT_MASTER_7_10;
memcpy(&spi_select_master[7], &spi_select_7_10, sizeof(Pin));
}
PIO_Configure(spi_select_master, 8);
#else
PIO_Configure(spi_select_master, 7);
#endif
// Configure SPI interrupts for Master
NVIC_DisableIRQ(SPI_IRQn);
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn, PRIORITY_STACK_MASTER_SPI);
NVIC_EnableIRQ(SPI_IRQn);
// SPI reset
SPI->SPI_CR = SPI_CR_SWRST;
// Master mode configuration
SPI_Configure(SPI,
ID_SPI,
// Master mode
SPI_MR_MSTR |
// Mode fault detection disabled
SPI_MR_MODFDIS |
// Wait until receive register empty before read
SPI_MR_WDRBT |
// Chip select number
SPI_PCS(0) |
// Delay between chip selects
SPI_DLYBCS(SPI_DELAY_BETWEEN_CHIP_SELECT, BOARD_MCK));
// Configure slave select
SPI_ConfigureNPCS(SPI,
// slave select num
0,
// Delay between consecutive transfers
SPI_DLYBCT(SPI_DELAY_BETWEEN_TRANSFER, BOARD_MCK) |
// Delay before first SPCK
SPI_DLYBS(SPI_DELAY_BEFORE_FIRST_SPI_CLOCK, BOARD_MCK) |
// SPI baud rate
SPI_SCBR(SPI_CLOCK, BOARD_MCK));
// Disable RX and TX DMA transfer requests
spi_stack_master_disable_dma();
// Enable SPI peripheral.
SPI_Enable(SPI);
spi_stack_master_reset_recv_dma_buffer();
spi_stack_master_reset_send_dma_buffer();
// Call interrupt on end of slave select
SPI_EnableIt(SPI, SPI_IER_ENDRX | SPI_IER_ENDTX);
}
