/**
* \brief ILI9488 Hardware Initialization for SPI/SMC LCD.
*/
static void _ILI9488_Spi_HW_Initialize(void)
{
/* Pin configurations */
PIO_Configure(&lcd_spi_reset_pin, 1);
PIO_Configure(&lcd_spi_cds_pin, 1);
PIO_Configure(lcd_pins, PIO_LISTSIZE(lcd_pins));
PIO_Configure(&lcd_spi_pwm_pin, 1);
/* Enable PWM peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
PMC_EnablePeripheral(ID_SPI0);
/* Set clock A and clock B */
// set for 14.11 KHz for CABC control
//mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) |
//PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110));
PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK);
/* Configure PWM channel 1 for LED0 */
PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD);
PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA, 0,
PWM_CMR_CPOL);
PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16);
PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8);
PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD);
SPI_Configure(ILI9488_SPI, ID_SPI0, (SPI_MR_MSTR | SPI_MR_MODFDIS
| SPI_PCS(SMC_EBI_LCD_CS)));
SPI_ConfigureNPCS(ILI9488_SPI,
SMC_EBI_LCD_CS,
SPI_CSR_CPOL | SPI_CSR_BITS_8_BIT | SPI_DLYBS(6, BOARD_MCK)
| SPI_DLYBCT(100, BOARD_MCK) | SPI_SCBR(20000000, BOARD_MCK));
SPI_Enable(ILI9488_SPI);
}
static void ILI9488_InitInterface(void)
{
PIO_Configure(ILI9488_Reset, PIO_LISTSIZE(ILI9488_Reset));
PIO_Configure(spi_pins, PIO_LISTSIZE(spi_pins));
PIO_Configure(ILI9488_Pwm, PIO_LISTSIZE(ILI9488_Pwm));
/* Enable PWM peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
/* Set clock A and clock B */
// set for 14.11 KHz for CABC control
// mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) |
// PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110));
PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK);
/* Configure PWM channel 1 for LED0 */
PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD);
PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA,0,PWM_CMR_CPOL);
PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16);
PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8);
PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD);
SPI_Configure(ILI9488, ILI9488_ID, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( ILI9488_cs )));
SPI_ConfigureNPCS( ILI9488, ILI9488_cs,
SPI_CSR_CPOL | SPI_CSR_BITS_9_BIT |
SPI_DLYBS(100, BOARD_MCK) | SPI_DLYBCT(100, BOARD_MCK) |
SPI_SCBR( 35000000, BOARD_MCK) ) ;
SPI_Enable(ILI9488);
}
/**
* \brief Initialize SPI as master
*/
static void SpiMasterInitialize( void )
{
printf( "-I- Configure SPI as master\n\r" ) ;
/* Master mode */
SPI_Configure( SPI_MASTER_BASE, ID_SPI, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( 0 ) ) ;
SPI_ConfigureNPCS( SPI_MASTER_BASE, 0, SPI_DLYBCT( 100000, BOARD_MCK ) | SPI_DLYBS(100000, BOARD_MCK) | SPI_SCBR( spiClock, BOARD_MCK) ) ;
/* Disable the RX and TX PDC transfer requests */
SPI_PdcDisableTx( SPI_MASTER_BASE ) ;
SPI_PdcDisableRx( SPI_MASTER_BASE ) ;
/* Enables a SPI peripheral. */
SPI_Enable( SPI_MASTER_BASE ) ;
}
/**
* \brief Configures spi in master mode.
*/
static void _ConfigureSpiMaster(void)
{
/* Configure SPI master mode */
SPI_Configure(SPI, ID_SPI, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS(1)));
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn ,1);
NVIC_EnableIRQ(SPI_IRQn);
SPI_DisableIt(SPI, 0xffffffff);
SPI_ConfigureNPCS(SPI, 1,
SPI_DLYBCT( 100, BOARD_MCK ) |
SPI_DLYBS(100, BOARD_MCK) |
SPI_SCBR( spiClock, BOARD_MCK) |
SPI_CSR_BITS_8_BIT);
}
void spi_stack_master_init(void) {
Pin spi_master_pins[] = {PINS_SPI};
PIO_Configure(spi_master_pins, PIO_LISTSIZE(spi_master_pins));
#ifndef CONSOLE_USART_USE_UART1
if(master_get_hardware_version() > 10) {
Pin spi_select_7_20 = PIN_SPI_SELECT_MASTER_7_20;
memcpy(&spi_select_master[7], &spi_select_7_20, sizeof(Pin));
} else {
Pin spi_select_7_10 = PIN_SPI_SELECT_MASTER_7_10;
memcpy(&spi_select_master[7], &spi_select_7_10, sizeof(Pin));
}
PIO_Configure(spi_select_master, 8);
#else
PIO_Configure(spi_select_master, 7);
#endif
// Master mode configuration
SPI_Configure(SPI,
ID_SPI,
// Master mode
SPI_MR_MSTR |
// Mode fault detection disabled
SPI_MR_MODFDIS |
// Wait until receive register empty before read
SPI_MR_WDRBT |
// Chip select number
SPI_PCS(0) |
// Delay between chip selects
SPI_DLYBCS(SPI_DELAY_BETWEEN_CHIP_SELECT, BOARD_MCK));
// Configure slave select
SPI_ConfigureNPCS(SPI,
// slave select num
0,
// Delay between consecutive transfers
SPI_DLYBCT(SPI_DELAY_BETWEEN_TRANSFER, BOARD_MCK) |
// Delay before first SPCK
SPI_DLYBS(SPI_DELAY_BEFORE_FIRST_SPI_CLOCK, BOARD_MCK) |
// SPI baud rate
SPI_SCBR(SPI_CLOCK, BOARD_MCK));
// Enable SPI peripheral.
SPI_Enable(SPI);
}
void spi_stack_master_init(void) {
// Set starting sequence number to something that slave does not expect
// (default for slave is 0)
//spi_stack_master_seq = 1;
for(uint8_t i = 0; i < SPI_ADDRESS_MAX; i++) {
slave_status[i] = SLAVE_STATUS_ABSENT;
}
Pin spi_master_pins[] = {PINS_SPI};
PIO_Configure(spi_master_pins, PIO_LISTSIZE(spi_master_pins));
#ifndef CONSOLE_USART_USE_UART1
if(master_get_hardware_version() > 10) {
Pin spi_select_7_20 = PIN_SPI_SELECT_MASTER_7_20;
memcpy(&spi_select_master[7], &spi_select_7_20, sizeof(Pin));
} else {
Pin spi_select_7_10 = PIN_SPI_SELECT_MASTER_7_10;
memcpy(&spi_select_master[7], &spi_select_7_10, sizeof(Pin));
}
PIO_Configure(spi_select_master, 8);
#else
PIO_Configure(spi_select_master, 7);
#endif
// Configure SPI interrupts for Master
NVIC_DisableIRQ(SPI_IRQn);
NVIC_ClearPendingIRQ(SPI_IRQn);
NVIC_SetPriority(SPI_IRQn, PRIORITY_STACK_MASTER_SPI);
NVIC_EnableIRQ(SPI_IRQn);
// SPI reset
SPI->SPI_CR = SPI_CR_SWRST;
// Master mode configuration
SPI_Configure(SPI,
ID_SPI,
// Master mode
SPI_MR_MSTR |
// Mode fault detection disabled
SPI_MR_MODFDIS |
// Wait until receive register empty before read
SPI_MR_WDRBT |
// Chip select number
SPI_PCS(0) |
// Delay between chip selects
SPI_DLYBCS(SPI_DELAY_BETWEEN_CHIP_SELECT, BOARD_MCK));
// Configure slave select
SPI_ConfigureNPCS(SPI,
// slave select num
0,
// Delay between consecutive transfers
SPI_DLYBCT(SPI_DELAY_BETWEEN_TRANSFER, BOARD_MCK) |
// Delay before first SPCK
SPI_DLYBS(SPI_DELAY_BEFORE_FIRST_SPI_CLOCK, BOARD_MCK) |
// SPI baud rate
SPI_SCBR(SPI_CLOCK, BOARD_MCK));
// Disable RX and TX DMA transfer requests
spi_stack_master_disable_dma();
// Enable SPI peripheral.
SPI_Enable(SPI);
spi_stack_master_reset_recv_dma_buffer();
spi_stack_master_reset_send_dma_buffer();
// Call interrupt on end of slave select
SPI_EnableIt(SPI, SPI_IER_ENDRX | SPI_IER_ENDTX);
}
