/**
* Enable/Disable audio channels
*/
static void AudioPlayEnable(uint8_t enable)
{
if (enable == 1)
SSC_EnableTransmitter(SSC);
else if (enable == 0)
SSC_DisableTransmitter(SSC);
}
//---------------------------
void glcd_init(void)
{
unsigned int tcmr,tfmr;
unsigned char i;
PIO_Configure(GLcdpins,PIO_LISTSIZE(GLcdpins));
PIO_Configure(sscPins, PIO_LISTSIZE(sscPins));
PIO_Set(&GLcdpins[3]);
PIO_Set(&GLcdpins[4]);
SSC_Configure(AT91C_BASE_SSC,AT91C_ID_SSC,500000,BOARD_MCK);
tcmr=AT91C_SSC_CKS_TK|AT91C_SSC_CKO_DATA_TX|AT91C_SSC_START_CONTINOUS;
tfmr=SSC_DATLEN(8)|SSC_DATNB(15)|SSC_FSLEN(16)|AT91C_SSC_FSOS_LOW|AT91C_SSC_FSDEN ;
SSC_ConfigureTransmitter(AT91C_BASE_SSC,tcmr,tfmr);
SSC_EnableTransmitter(AT91C_BASE_SSC);
PIO_Set(&GLcdpins[5]);
//PIO_Clear(&GLcdpins[5]);
for(i = 0; i < 3; i++);
GLCD_WriteCommand((DISPLAY_ON_CMD | ON), i);
}
/**
* \brief Start DMA sending/waiting data.
*/
static void _SscDma(volatile uint32_t *pReg, uint32_t dmaChannel,
void *pBuffer, uint16_t wSize)
{
sXdmad *pDmad = &dmad;
sXdmadCfg xdmadCfg;
xdmadCfg.mbr_ubc = wSize;
xdmadCfg.mbr_sa = (uint32_t) pBuffer;
xdmadCfg.mbr_da = (uint32_t) pReg;
xdmadCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN
| XDMAC_CC_MBSIZE_SINGLE
| XDMAC_CC_DSYNC_MEM2PER
| XDMAC_CC_CSIZE_CHK_1
| XDMAC_CC_DWIDTH_HALFWORD
| XDMAC_CC_SIF_AHB_IF1
| XDMAC_CC_DIF_AHB_IF1
| XDMAC_CC_SAM_INCREMENTED_AM
| XDMAC_CC_DAM_FIXED_AM
| XDMAC_CC_PERID(XDMAIF_Get_ChannelNumber(
ID_SSC, XDMAD_TRANSFER_TX));
xdmadCfg.mbr_bc = 0;
xdmadCfg.mbr_ds = 0;
xdmadCfg.mbr_sus = 0;
xdmadCfg.mbr_dus = 0;
memory_sync();
XDMAD_ConfigureTransfer(pDmad, dmaChannel, &xdmadCfg, 0, 0, (
XDMAC_CIE_BIE |
XDMAC_CIE_DIE |
XDMAC_CIE_FIE |
XDMAC_CIE_RBIE |
XDMAC_CIE_WBIE |
XDMAC_CIE_ROIE));
SCB_CleanDCache_by_Addr((uint32_t *)pBuffer, wSize);
XDMAD_StartTransfer(pDmad, dmaChannel);
SSC_EnableTransmitter(SSC);
}
/**
* \brief Receive and play audio with DMA.
*/
static void PlayRecording(void)
{
uint32_t src;
uint8_t i;
uint32_t xdmaCndc;
src = 0x20440000;
for(i = 0; i < TOTAL_Buffers; i++){
dmaReadLinkList[i].mbr_ubc = XDMA_UBC_NVIEW_NDV1
| XDMA_UBC_NDE_FETCH_EN
| XDMA_UBC_NSEN_UPDATED
| XDMAC_CUBC_UBLEN(0x1000);
dmaReadLinkList[i].mbr_sa = (uint32_t)&(AUDIO_IF->SSC_RHR);
dmaReadLinkList[i].mbr_da = (uint32_t)(src );
if ( i == (TOTAL_Buffers - 1)){
dmaReadLinkList[i].mbr_nda = (uint32_t)&dmaReadLinkList[0];
}
else {
dmaReadLinkList[i].mbr_nda = (uint32_t)&dmaReadLinkList[i + 1];
}
src += (0x1000 * (BITS_BY_SLOT/8));
}
xdmadCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN
| XDMAC_CC_MBSIZE_SINGLE
| XDMAC_CC_DSYNC_PER2MEM
| XDMAC_CC_CSIZE_CHK_1
| XDMAC_CC_DWIDTH_HALFWORD
| XDMAC_CC_SIF_AHB_IF1
| XDMAC_CC_DIF_AHB_IF0
| XDMAC_CC_SAM_FIXED_AM
| XDMAC_CC_DAM_INCREMENTED_AM
| XDMAC_CC_PERID(XDMAIF_Get_ChannelNumber(ID_SSC, XDMAD_TRANSFER_RX ));
xdmaCndc = XDMAC_CNDC_NDVIEW_NDV1
| XDMAC_CNDC_NDE_DSCR_FETCH_EN
| XDMAC_CNDC_NDSUP_SRC_PARAMS_UPDATED
| XDMAC_CNDC_NDDUP_DST_PARAMS_UPDATED ;
XDMAD_ConfigureTransfer( &dmad, sscDmaRxChannel, &xdmadCfg, xdmaCndc, (uint32_t)&dmaReadLinkList[0],XDMAC_CIE_LIE);
SCB_CleanInvalidateDCache();
src = 0x20440000;
for(i = 0; i < TOTAL_Buffers; i++){
dmaWriteLinkList[i].mbr_ubc = XDMA_UBC_NVIEW_NDV1
| XDMA_UBC_NDE_FETCH_EN
| XDMA_UBC_NSEN_UPDATED
| XDMAC_CUBC_UBLEN(0x1000);
dmaWriteLinkList[i].mbr_sa = (uint32_t)(src );
dmaWriteLinkList[i].mbr_da = (uint32_t)&(AUDIO_IF->SSC_THR);
if ( i == (TOTAL_Buffers - 1 )) {
dmaWriteLinkList[i].mbr_nda = (uint32_t)&dmaWriteLinkList[0];
}
else {
dmaWriteLinkList[i].mbr_nda = (uint32_t)&dmaWriteLinkList[i+1];
}
src += (0x1000 * (BITS_BY_SLOT/8));
}
xdmadCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN
| XDMAC_CC_MBSIZE_SINGLE
| XDMAC_CC_DSYNC_MEM2PER
| XDMAC_CC_CSIZE_CHK_1
| XDMAC_CC_DWIDTH_HALFWORD
| XDMAC_CC_SIF_AHB_IF0
| XDMAC_CC_DIF_AHB_IF1
| XDMAC_CC_SAM_INCREMENTED_AM
| XDMAC_CC_DAM_FIXED_AM
| XDMAC_CC_PERID(XDMAIF_Get_ChannelNumber(ID_SSC, XDMAD_TRANSFER_TX ));
xdmaCndc = XDMAC_CNDC_NDVIEW_NDV1
| XDMAC_CNDC_NDE_DSCR_FETCH_EN
| XDMAC_CNDC_NDSUP_SRC_PARAMS_UPDATED
| XDMAC_CNDC_NDDUP_DST_PARAMS_UPDATED ;
XDMAD_ConfigureTransfer( &dmad, sscDmaTxChannel, &xdmadCfg, xdmaCndc, (uint32_t)&dmaWriteLinkList[0],XDMAC_CIE_LIE);
SCB_CleanInvalidateDCache();
XDMAD_StartTransfer( &dmad, sscDmaRxChannel );
SSC_EnableReceiver(AUDIO_IF);
Wait(3000);
/* Enable playback(SSC TX) */
SCB_CleanInvalidateDCache();
XDMAD_StartTransfer( &dmad, sscDmaTxChannel);
SSC_EnableTransmitter(AUDIO_IF);
}
// ============================================================================
void lcd_init()
{
unsigned int tcmr,tfmr;
PIO_Configure(Lcdpins,PIO_LISTSIZE(Lcdpins));
PIO_Configure(sscPins, PIO_LISTSIZE(sscPins));
SSC_Configure(AT91C_BASE_SSC,AT91C_ID_SSC,500000,BOARD_MCK);
tcmr=AT91C_SSC_CKS_TK|AT91C_SSC_CKO_DATA_TX|AT91C_SSC_START_CONTINOUS;
tfmr=SSC_DATLEN(8)|SSC_DATNB(15)|SSC_FSLEN(16)|AT91C_SSC_FSOS_LOW|AT91C_SSC_FSDEN ;
SSC_ConfigureTransmitter(AT91C_BASE_SSC,tcmr,tfmr);
SSC_EnableTransmitter(AT91C_BASE_SSC);
// disable peripheral mode of this pins
clcd_Delay();
setD4567(0);
//---------one------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-----------two-----------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-------three-------------
setD4567(1<<5);
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//--------4 _BV--dual line---------------
lcd_command(0x28);
//-----increment address, invisible cursor shift------
lcd_command(0x0c);
clcd_Delay();
// disable peripheral mode of this pins
clcd_Delay();
setD4567(0);
//---------one------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-----------two-----------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-------three-------------
setD4567(1<<5);
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//--------4 _BV--dual line---------------
lcd_command(0x28);
//-----increment address, invisible cursor shift------
lcd_command(0x0c);
clcd_Delay();
PIO_Configure(Lcdpins,PIO_LISTSIZE(Lcdpins));
PIO_Configure(sscPins, PIO_LISTSIZE(sscPins));
// disable peripheral mode of this pins
clcd_Delay();
setD4567(0);
//---------one------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-----------two-----------
setD4567((1<<5)|(1<<4));
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//-------three-------------
setD4567(1<<5);
PIO_Set(&Lcdpins[1]);
clcd_minDelay();
PIO_Clear(&Lcdpins[1]);
clcd_Delay();
//--------4 _BV--dual line---------------
lcd_command(0x28);
//-----increment address, invisible cursor shift------
lcd_command(0x0c);
clcd_Delay();
}
