Пример #1
0
void SSPSend2(const uint8_t a, const uint8_t b)
{
	uint8_t buf[2];
	buf[0] = a;
	buf[1] = b;
	SSPSend(buf, 2);
}
/*****************************************************************************
** Function name:		LoopbackTest
**
** Descriptions:		Loopback test
**				
** parameters:			None
** Returned value:		None
** 
*****************************************************************************/
void LoopbackTest( uint32_t portnum, uint32_t location )
{
  uint32_t i;

#if !USE_CS
  /* Set SSEL pin to output low. */
  SSP_SSELToggle( portnum, 0 );
#endif
  i = 0;
  while ( i <= SSP_BUFSIZE )
  {
	/* to check the RXIM and TXIM interrupt, I send a block data at one time 
	based on the FIFOSIZE(8). */
	SSPSend( portnum, (uint8_t *)&src_addr[i], FIFOSIZE );
	/* If RX interrupt is enabled, below receive routine can be
	also handled inside the ISR. */
	SSPReceive( portnum, (uint8_t *)&dest_addr[i], FIFOSIZE );
	i += FIFOSIZE;
  }
#if !USE_CS
  /* Set SSEL pin to output high. */
  SSP_SSELToggle( portnum, 1 );
#endif
   
  /* verifying write and read data buffer. */
  for ( i = 0; i < SSP_BUFSIZE; i++ )
  {
	if ( src_addr[i] != dest_addr[i] )
	{
	  while( 1 );			/* Verification failed */
	}
  }
  return;
}
Пример #3
0
void readRegister(uint8_t reg, uint8_t * value, uint8_t len){

	csnLow();
	SSPSend(&reg, 1);
	SSPReceive((uint8_t *)value, len);
	csnHi();
}
Пример #4
0
void writeRegister(uint8_t reg, uint8_t * value, uint8_t len){
	uint8_t* rx = (uint8_t*)malloc(sizeof(uint8_t)*(len+1));
	rx[0] = W_REGISTER | (REGISTER_MASK & reg);
	uint8_t a;
	for(a = 1; a < len+1; a++){
		rx[a] = value[a-1];
	}
	csnLow();
	free(rx);
	SSPSend(rx, len+1);
	csnHi();

}
Пример #5
0
void send_rf(uint8_t * value)
// Sends a data package to the default address. Be sure to send the correct
// amount of bytes as configured as payload on the receiver.
{
    uint8_t status;
    status = getStatus();
    while (PTX) {
	    status = getStatus();
	    if((status & ((1 << TX_DS)  | (1 << MAX_RT)))){
		    PTX = 0;
		    break;
	    }
    }                  // Wait until last paket is send

    ceLow();

    powerUpTx();       // Set to transmitter mode , Power up

    csnLow();
    uint8_t result = FLUSH_TX;
    SSPSend(&result, 1);
    csnHi();


    uint8_t* rx = (uint8_t*)malloc(sizeof(uint8_t)*(payload+1));
    rx[0] = W_TX_PAYLOAD;
    uint8_t a;
    for(a = 1; a < payload+1; a++){
    	rx[a] = value[a-1];
    }
    csnLow();
    SSPSend(rx, payload+1);
    free(rx);
    csnHi();

    ceHi();                     // Start transmission
    while(isSending());
}
Пример #6
0
/******************************************************************************
** Function name:		write_adf7012_reg
**
** Descriptions:		adf7012 entegresine istenen register degerini yazar
** Parameters:			reg_value , yazilacak byte dizisinin ilk karaketerine pointer
** Returned value:		returns TRUE if successfull
**
******************************************************************************/
_Bool Write_Adf7012_Reg(uint8_t* reg_value){

  Delay_ms(10);
  ADF7021_LOAD_REGISTER_ENABLE;
force_register:
  SSPSend(PORTNUM, reg_value, sizeof(reg_value));
  if(timeout_flag != 0){
      timeout_flag = 0;
      goto force_register;
    }
  ADF7021_LOAD_REGISTER_DISABLE;
  Delay_ms(10);
  return TRUE;
}
/******************************************************************************
**   Main Function  main()
******************************************************************************/
int main (void)
{
  uint32_t i, portnum = PORT_NUM;

  /* SystemClockUpdate() updates the SystemFrequency variable */
  SystemClockUpdate();

  if ( portnum == 0 )
	SSP0Init();			/* initialize SSP port */
  else if ( portnum == 1 )
	SSP1Init();
  
  for ( i = 0; i < SSP_BUFSIZE; i++ )
  {
	src_addr[i] = (uint8_t)i;
	dest_addr[i] = 0;
  }

#if TX_RX_ONLY
  /* For the inter-board communication, one board is set as
  master transmit, the other is set to slave receive. */
#if SSP_SLAVE
  /* Slave receive */
  SSPReceive( portnum, (uint8_t *)dest_addr, SSP_BUFSIZE );
  for ( i = 0; i < SSP_BUFSIZE; i++ )
  {
	if ( src_addr[i] != dest_addr[i] )
	{
	  while ( 1 );				/* Verification failure, fatal error */
	} 
  }
#else
  /* Master transmit */
  SSPSend( portnum, (uint8_t *)src_addr, SSP_BUFSIZE);
#endif
#else
  /* TX_RX_ONLY=0, it's either an internal loopback test
  within SSP peripheral or communicate with a serial EEPROM. */
#if LOOPBACK_MODE
  LoopbackTest( portnum, LOCATION_NUM );
#else
  SEEPROMTest( portnum, LOCATION_NUM );
#endif			/* endif NOT LOOPBACK_MODE */
#endif			/* endif NOT TX_RX_ONLY */
  /* Never exit from main(), for easy debugging. */
  while ( 1 );
  return 0;
}
Пример #8
0
/******************************************************************************
** Function name:		init_adf7012
**
** Descriptions:		adf7012 entegresini OOK modunda istenen konfigurasyonda baslatir
** Returned value:		returns TRUE if successfull
**
******************************************************************************/
_Bool Init_Adf7012(void){

uint8_t register0[4] = {0x04, 0x11, 0xE0, 0x00};
uint8_t register1[3] = {0x5B, 0x40, 0x01}      ;
uint8_t register2[4] = {0x00, 0x00, 0x81, 0xEE};
uint8_t register3[4] = {0x00, 0x45, 0x20, 0xFF};

Delay_ms(500);

/*send register0*/

ADF7021_LOAD_REGISTER_ENABLE;

Delay_ms(1);
force_register0:
  SSPSend(PORTNUM, register0, sizeof(register0));
  if(timeout_flag != 0){
    timeout_flag = 0;
    goto force_register0;
  }
  Delay_ms(1);
  ADF7021_LOAD_REGISTER_DISABLE;
  Delay_ms(10);

/*send register1*/
  ADF7021_LOAD_REGISTER_ENABLE;
  Delay_ms(1);
force_register1:
  SSPSend(PORTNUM, register1, sizeof(register1));
  if(timeout_flag != 0){
    timeout_flag = 0;
    goto force_register1;
  }
  Delay_ms(1);
  ADF7021_LOAD_REGISTER_DISABLE;
  Delay_ms(10);

/*send register2*/
  ADF7021_LOAD_REGISTER_ENABLE;
  Delay_ms(1);
force_register2:
  SSPSend(PORTNUM, register2, sizeof(register2));
  if(timeout_flag != 0){
     timeout_flag = 0;
     goto force_register2;
   }
  Delay_ms(1);
  ADF7021_LOAD_REGISTER_DISABLE;
  Delay_ms(10);


  /*send register3 */
  ADF7021_LOAD_REGISTER_ENABLE;
  Delay_ms(1);
force_register3:
  SSPSend(PORTNUM, register3, sizeof(register3));
  if(timeout_flag != 0){
     timeout_flag = 0;
     goto force_register3;
   }
  Delay_ms(1);
  ADF7021_LOAD_REGISTER_DISABLE;
  Delay_ms(10);

return TRUE;
}
/*****************************************************************************
** Function name:		SEEPROMTest
**
** Descriptions:		Serial EEPROM(Atmel 25xxx) test
**				
** parameters:			None
** Returned value:		None
** 
*****************************************************************************/
void SEEPROMTest( uint32_t portnum, uint32_t location )
{
  uint32_t i, timeout;
#if SSP_DEBUG
  uint8_t temp[2];
#endif

  if ( portnum == 1 )
  {
	LPC_GPIO0->FIODIR |= (0x1<<16);		/* SSP1, P0.16 defined as Outputs */
  }
  else
  {
	LPC_GPIO0->FIODIR |= (0x1<<6);		/* SSP0 P0.6 defined as Outputs */
  }
  SSP_SSELToggle( portnum, 0 );

  /* Test Atmel 25016 SPI SEEPROM. */
  src_addr[0] = WREN;			/* set write enable latch */
  SSPSend( portnum, (uint8_t *)src_addr, 1 );
  SSP_SSELToggle( portnum, 1 );

  for ( i = 0; i < DELAY_COUNT; i++ );	/* delay minimum 250ns */

  SSP_SSELToggle( portnum, 0 );
  src_addr[0] = RDSR;	/* check status to see if write enabled is latched */
  SSPSend( portnum, (uint8_t *)src_addr, 1 );
  SSPReceive( portnum, (uint8_t *)dest_addr, 1 );
  SSP_SSELToggle( portnum, 1 );
  if ( dest_addr[0] & (RDSR_WEN|RDSR_RDY) != RDSR_WEN ) 
  /* bit 0 to 0 is ready, bit 1 to 1 is write enable */
  {
	while ( 1 );
  }

  for ( i = 0; i < SSP_BUFSIZE; i++ )	/* Init RD and WR buffer */    
  {
	src_addr[i+3] = i;	/* leave three bytes for cmd and offset(16 bits) */
	dest_addr[i] = 0;
  }

  /* please note the first two bytes of WR and RD buffer is used for
  commands and offset, so only 2 through SSP_BUFSIZE is used for data read,
  write, and comparison. */
  SSP_SSELToggle( portnum, 0 );
  src_addr[0] = WRITE;	/* Write command is 0x02, low 256 bytes only */
  src_addr[1] = 0x00;	/* write address offset MSB is 0x00 */
  src_addr[2] = 0x00;	/* write address offset LSB is 0x00 */
  SSPSend( portnum, (uint8_t *)src_addr, SSP_BUFSIZE );
  SSP_SSELToggle( portnum, 1 );

  for ( i = 0; i < 0x30000; i++ );	/* delay, minimum 3ms */
  
  timeout = 0;
  while ( timeout < MAX_TIMEOUT )
  {
	SSP_SSELToggle( portnum, 0 );
	src_addr[0] = RDSR;	/* check status to see if write cycle is done or not */
	SSPSend( portnum, (uint8_t *)src_addr, 1);
	SSPReceive( portnum, (uint8_t *)dest_addr, 1 );
	SSP_SSELToggle( portnum, 1 );
	if ( (dest_addr[0] & RDSR_RDY) == 0x00 )	/* bit 0 to 0 is ready */
	{
	    break;
	}
	timeout++;
  }
  if ( timeout == MAX_TIMEOUT )
  {
	while ( 1 );
  }

  for ( i = 0; i < DELAY_COUNT; i++ );	/* delay, minimum 250ns */

  SSP_SSELToggle( portnum, 0 );
  src_addr[0] = READ;		/* Read command is 0x03, low 256 bytes only */
  src_addr[1] = 0x00;		/* Read address offset MSB is 0x00 */
  src_addr[2] = 0x00;		/* Read address offset LSB is 0x00 */
  SSPSend( portnum, (uint8_t *)src_addr, 3 ); 
  SSPReceive( portnum, (uint8_t *)&dest_addr[3], SSP_BUFSIZE-3 );
  SSP_SSELToggle( portnum, 1 );

  /* verifying, ignore the difference in the first two bytes */
  for ( i = 3; i < SSP_BUFSIZE; i++ )
  {
	if ( src_addr[i] != dest_addr[i] )
	{
	  while( 1 );			/* Verification failed */
	}
  }
  return;
}
Пример #10
0
void flushRx(){
	uint8_t result = FLUSH_RX;
	csnLow();
	SSPSend(&result, 1);
	csnHi();
}