int main(void)
{
SYS_INIT_OK=0; //初始化标志
SYS_INIT();
SYS_INIT_OK=1;
while (1)
{
}
}
int main(int argc, char** argv) {
unsigned char adc_state = 1 ;
unsigned int time_out = 0 ;
unsigned int adcval = 0;
SYS_INIT();
PIC_ADC_INIT();
while(1){
switch(adc_state)
{
case START_ADC :
ADCON0bits.GO = START_ADC ;
adc_state = POLL_ADC ;
break ;
case POLL_ADC :
if(ADCON0bits.GO == ADC_RDY)
{
adc_state = READ_ADC ;
time_out = 0;
}
else
{
time_out++ ;
if(time_out > TIME_TICKS )
adc_state = TIME_OUT ;
}
break ;
case READ_ADC :
adcval = ((ADRESH << 8) | ADRESL) ;
if(adcval > THRESHOLD) //light decrease count increase
PORTCbits.RC0 = 1; //RC0 is high level
else
PORTCbits.RC0 = 0; //RC0 is low level
adc_state = START_ADC ;
break ;
case TIME_OUT :
PIC_ADC_INIT();
adc_state = START_ADC ;
time_out = 0;
break ;
}
}
return (EXIT_SUCCESS);
}
int main(void)
{
static u8 att_cnt=0;
static u8 rc_cnt=0;
static T_int16_xyz mpu6050_dataacc1,mpu6050_dataacc2,mpu6050_datagyr1,mpu6050_datagyr2;
static u8 senser_cnt=0,status_cnt=0,dt_rc_cnt=0,dt_moto_cnt=0;
SYS_INIT();
while (1)
{
if(FLAG_ATT) //1ms
{
FLAG_ATT = 0;
att_cnt++;
rc_cnt++;
if(att_cnt==1)
MPU6050_Dataanl(&mpu6050_dataacc1,&mpu6050_datagyr1); //2ms
else
{
att_cnt = 0;
MPU6050_Dataanl(&mpu6050_dataacc2,&mpu6050_datagyr2);
Acc.X = (mpu6050_dataacc1.X+mpu6050_dataacc2.X)/2;
Acc.Y = (mpu6050_dataacc1.Y+mpu6050_dataacc2.Y)/2;
Acc.Z = (mpu6050_dataacc1.Z+mpu6050_dataacc2.Z)/2;
Gyr.X = (mpu6050_datagyr1.X+mpu6050_datagyr2.X)/2;
Gyr.Y = (mpu6050_datagyr1.Y+mpu6050_datagyr2.Y)/2;
Gyr.Z = (mpu6050_datagyr1.Z+mpu6050_datagyr2.Z)/2;
Prepare_Data(&Acc,&Acc_AVG); //加速度滤波
IMUupdate(&Gyr,&Acc_AVG,&Att_Angle); //IMU姿态解算
Control(&Att_Angle,&Gyr,&Rc_D,Rc_C.ARMED); //2ms
if(Rc_C.ARMED)
LED3_ON
else
LED3_OFF
senser_cnt++;
status_cnt++;
dt_rc_cnt++;
dt_moto_cnt++;
if(senser_cnt==5) //10ms
{
senser_cnt = 0;
Send_Senser = 1;
}
if(status_cnt==5) //10ms
{
status_cnt = 0;
Send_Status = 1;
}
if(dt_rc_cnt==10) //20ms
{
dt_rc_cnt=0;
Send_RCData = 1;
}
if(dt_moto_cnt==10) //20ms
{
dt_moto_cnt=0;
Send_MotoPwm = 1;
LED2_OFF
}
}
}
}
static ALWAYS_INLINE void clkInit(void)
{
/*
* Core clock: 48MHz
* Bus clock: 24MHz
*/
const mcg_pll_config_t pll0Config = {
.enableMode = 0U, .prdiv = CONFIG_MCG_PRDIV0, .vdiv = CONFIG_MCG_VDIV0,
};
const sim_clock_config_t simConfig = {
.pllFllSel = 1U, /* PLLFLLSEL select PLL. */
.er32kSrc = 3U, /* ERCLK32K selection, use LPO. */
.clkdiv1 = 0x10010000U, /* SIM_CLKDIV1. */
};
const osc_config_t oscConfig = {.freq = CONFIG_OSC_XTAL0_FREQ,
.capLoad = 0,
#if defined(CONFIG_OSC_EXTERNAL)
.workMode = kOSC_ModeExt,
#elif defined(CONFIG_OSC_LOW_POWER)
.workMode = kOSC_ModeOscLowPower,
#elif defined(CONFIG_OSC_HIGH_GAIN)
.workMode = kOSC_ModeOscHighGain,
#else
#error "An oscillator mode must be defined"
#endif
.oscerConfig = {
.enableMode = kOSC_ErClkEnable,
#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && \
FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
.erclkDiv = 0U,
#endif
} };
CLOCK_SetSimSafeDivs();
CLOCK_InitOsc0(&oscConfig);
/* Passing the XTAL0 frequency to clock driver. */
CLOCK_SetXtal0Freq(CONFIG_OSC_XTAL0_FREQ);
CLOCK_BootToPeeMode(kMCG_OscselOsc, kMCG_PllClkSelPll0, &pll0Config);
CLOCK_SetInternalRefClkConfig(kMCG_IrclkEnable, kMCG_IrcSlow, 0);
CLOCK_SetSimConfig(&simConfig);
#ifdef CONFIG_UART_MCUX_LPSCI_0
CLOCK_SetLpsci0Clock(LPSCI0SRC_MCGFLLCLK);
#endif
}
static int kl2x_init(struct device *arg)
{
ARG_UNUSED(arg);
int oldLevel; /* old interrupt lock level */
/* disable interrupts */
oldLevel = irq_lock();
/* Disable the watchdog */
SIM->COPC = 0;
/* Initialize system clock to 48 MHz */
clkInit();
/*
* install default handler that simply resets the CPU
* if configured in the kernel, NOP otherwise
*/
NMI_INIT();
/* restore interrupt state */
irq_unlock(oldLevel);
return 0;
}
SYS_INIT(kl2x_init, PRE_KERNEL_1, 0);
