static void ssauart_change_speed (struct uart_port *port, u_int cflag, u_int iflag, u_int quot) { u_int lcr_h; unsigned long flags; #if DEBUG printk("ssauart_set_cflag(0x%x) called\n", cflag); #endif /* byte size and parity */ switch (cflag & CSIZE) { case CS5: lcr_h = UART_LCR_WLEN5; break; case CS6: lcr_h = UART_LCR_WLEN6; break; case CS7: lcr_h = UART_LCR_WLEN7; break; default: lcr_h = UART_LCR_WLEN8; break; // CS8 } if (cflag & CSTOPB) lcr_h |= UART_LCR_STOP; if (cflag & PARENB) { lcr_h |= UART_LCR_PARITY; } local_irq_save(flags); port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; if (iflag & INPCK) port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; if (iflag & (BRKINT | PARMRK)) port->read_status_mask |= UART_LSR_BI; /* * Characters to ignore */ port->ignore_status_mask = 0; if (iflag & IGNPAR) port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; if (iflag & IGNBRK) { port->ignore_status_mask |= UART_LSR_BI; /* * If we're ignore parity and break indicators, ignore * overruns too. (For real raw support). */ if (iflag & IGNPAR) port->ignore_status_mask |= UART_LSR_OE; } /* * !!! ignore all characters if CREAD is not set */ if ((cflag & CREAD) == 0) port->ignore_status_mask |= UART_LSR_DR; /* Turn on DLAB */ UART_PUT_LCR(port, UART_GET_LCR(port) | UART_LCR_DLAB); /* Set baud rate */ UART_PUT_DLM(port, ((quot & 0xff00) >> 8)); UART_PUT_DLL(port, (quot & 0xff)); /* Turn off DLAB */ UART_PUT_LCR(port, UART_GET_LCR(port) & ~UART_LCR_DLAB); local_irq_restore(flags); }
static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed) { int ret = -EINVAL; unsigned int quot; unsigned short val, lsr, lcr; static int utime; int count = 10; lcr = WLS(8); switch (speed) { case 9600: case 19200: case 38400: case 57600: case 115200: /* * IRDA is not affected by anomaly 05000230, so there is no * need to tweak the divisor like he UART driver (which will * slightly speed up the baud rate on us). */ quot = (port->clk + (8 * speed)) / (16 * speed); do { udelay(utime); lsr = UART_GET_LSR(port); } while (!(lsr & TEMT) && count--); /* The useconds for 1 bits to transmit */ utime = 1000000 / speed + 1; /* Clear UCEN bit to reset the UART state machine * and control registers */ val = UART_GET_GCTL(port); val &= ~UCEN; UART_PUT_GCTL(port, val); /* Set DLAB in LCR to Access THR RBR IER */ UART_SET_DLAB(port); SSYNC(); UART_PUT_DLL(port, quot & 0xFF); UART_PUT_DLH(port, (quot >> 8) & 0xFF); SSYNC(); /* Clear DLAB in LCR */ UART_CLEAR_DLAB(port); SSYNC(); UART_PUT_LCR(port, lcr); val = UART_GET_GCTL(port); val |= UCEN; UART_PUT_GCTL(port, val); ret = 0; break; default: printk(KERN_WARNING "bfin_sir: Invalid speed %d\n", speed); break; } val = UART_GET_GCTL(port); /* If not add the 'RPOLC', we can't catch the receive interrupt. * It's related with the HW layout and the IR transiver. */ val |= IREN | RPOLC; UART_PUT_GCTL(port, val); return ret; }
static void bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; unsigned long flags; unsigned int baud, quot; unsigned short val, ier, lcr = 0; switch (termios->c_cflag & CSIZE) { case CS8: lcr = WLS(8); break; case CS7: lcr = WLS(7); break; case CS6: lcr = WLS(6); break; case CS5: lcr = WLS(5); break; default: printk(KERN_ERR "%s: word lengh not supported\n", __func__); } if (termios->c_cflag & CSTOPB) lcr |= STB; if (termios->c_cflag & PARENB) lcr |= PEN; if (!(termios->c_cflag & PARODD)) lcr |= EPS; if (termios->c_cflag & CMSPAR) lcr |= STP; port->read_status_mask = OE; if (termios->c_iflag & INPCK) port->read_status_mask |= (FE | PE); if (termios->c_iflag & (BRKINT | PARMRK)) port->read_status_mask |= BI; /* * Characters to ignore */ port->ignore_status_mask = 0; if (termios->c_iflag & IGNPAR) port->ignore_status_mask |= FE | PE; if (termios->c_iflag & IGNBRK) { port->ignore_status_mask |= BI; /* * If we're ignoring parity and break indicators, * ignore overruns too (for real raw support). */ if (termios->c_iflag & IGNPAR) port->ignore_status_mask |= OE; } baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); quot = uart_get_divisor(port, baud); spin_lock_irqsave(&uart->port.lock, flags); UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15); /* Disable UART */ ier = UART_GET_IER(uart); UART_DISABLE_INTS(uart); /* Set DLAB in LCR to Access DLL and DLH */ UART_SET_DLAB(uart); UART_PUT_DLL(uart, quot & 0xFF); UART_PUT_DLH(uart, (quot >> 8) & 0xFF); SSYNC(); /* Clear DLAB in LCR to Access THR RBR IER */ UART_CLEAR_DLAB(uart); UART_PUT_LCR(uart, lcr); /* Enable UART */ UART_ENABLE_INTS(uart, ier); val = UART_GET_GCTL(uart); val |= UCEN; UART_PUT_GCTL(uart, val); /* Port speed changed, update the per-port timeout. */ uart_update_timeout(port, termios->c_cflag, baud); spin_unlock_irqrestore(&uart->port.lock, flags); }