static bool udi_cdc_rx_start(void) { irqflags_t flags; uint8_t buf_sel_trans; flags = cpu_irq_save(); buf_sel_trans = udi_cdc_rx_buf_sel; if (udi_cdc_rx_trans_ongoing || (udi_cdc_rx_pos < udi_cdc_rx_buf_nb[buf_sel_trans])) { // Transfer already on-going or current buffer no empty cpu_irq_restore(flags); return false; } // Change current buffer udi_cdc_rx_pos = 0; udi_cdc_rx_buf_sel = (buf_sel_trans==0)?1:0; // Start transfer on RX udi_cdc_rx_trans_ongoing = true; cpu_irq_restore(flags); if (udi_cdc_is_rx_ready()) { UDI_CDC_RX_NOTIFY(); } return udd_ep_run( UDI_CDC_DATA_EP_OUT, true, udi_cdc_rx_buf[buf_sel_trans], UDI_CDC_RX_BUFFERS, udi_cdc_data_recevied); }
static bool udi_cdc_rx_start(uint8_t port) { irqflags_t flags; uint8_t buf_sel_trans; flags = cpu_irq_save(); buf_sel_trans = udi_cdc_rx_buf_sel[PORT]; if (udi_cdc_rx_trans_ongoing[PORT] || (udi_cdc_rx_pos[PORT] < udi_cdc_rx_buf_nb[PORT][buf_sel_trans])) { // Transfer already on-going or current buffer no empty cpu_irq_restore(flags); return false; } // Change current buffer udi_cdc_rx_pos[PORT] = 0; udi_cdc_rx_buf_sel[PORT] = (buf_sel_trans==0)?1:0; // Start transfer on RX udi_cdc_rx_trans_ongoing[PORT] = true; cpu_irq_restore(flags); if (udi_cdc_multi_is_rx_ready(PORT)) { #if UDI_CDC_PORT_NB == 1 UDI_CDC_RX_NOTIFY(); #else UDI_CDC_RX_NOTIFY(port); #endif } return udd_ep_run( UDI_CDC_DATA_EP_OUTS[PORT], true, udi_cdc_rx_buf[PORT][buf_sel_trans], UDI_CDC_RX_BUFFERS, udi_cdc_data_received_callbacks[PORT]); }
static bool udi_cdc_rx_start(uint8_t port) { irqflags_t flags; uint8_t buf_sel_trans; udd_ep_id_t ep; #if UDI_CDC_PORT_NB == 1 // To optimize code port = 0; #endif flags = cpu_irq_save(); buf_sel_trans = udi_cdc_rx_buf_sel[port]; if (udi_cdc_rx_trans_ongoing[port] || (udi_cdc_rx_pos[port] < udi_cdc_rx_buf_nb[port][buf_sel_trans])) { // Transfer already on-going or current buffer no empty cpu_irq_restore(flags); return false; } // Change current buffer udi_cdc_rx_pos[port] = 0; udi_cdc_rx_buf_sel[port] = (buf_sel_trans==0)?1:0; // Start transfer on RX udi_cdc_rx_trans_ongoing[port] = true; cpu_irq_restore(flags); if (udi_cdc_multi_is_rx_ready(port)) { UDI_CDC_RX_NOTIFY(port); } // Send the buffer with enable of short packet switch (port) { #define UDI_CDC_PORT_TO_DATA_EP_OUT(index, unused) \ case index: \ ep = UDI_CDC_DATA_EP_OUT_##index; \ break; MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_DATA_EP_OUT, ~) #undef UDI_CDC_PORT_TO_DATA_EP_OUT default: ep = UDI_CDC_DATA_EP_OUT_0; break; } return udd_ep_run(ep, true, udi_cdc_rx_buf[port][buf_sel_trans], UDI_CDC_RX_BUFFERS, udi_cdc_data_received); }