void
ud_syn_print_imm(struct ud* u, const struct ud_operand *op)
{
uint64_t v;
if (op->_oprcode == OP_sI && op->size != u->opr_mode) {
if (op->size == 8) {
v = (int64_t)op->lval.sbyte;
} else {
UD_ASSERT(op->size == 32);
v = (int64_t)op->lval.sdword;
}
if (u->opr_mode < 64) {
v = v & ((1ull << u->opr_mode) - 1ull);
}
} else {
switch (op->size) {
case 8 : v = op->lval.ubyte; break;
case 16: v = op->lval.uword; break;
case 32: v = op->lval.udword; break;
case 64: v = op->lval.uqword; break;
default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */
}
}
ud_asmprintf(u, "0x%" FMT64 "x", v);
}
void
ud_syn_print_mem_disp(struct ud* u, const struct ud_operand *op, int sign)
{
UD_ASSERT(op->offset != 0);
if (op->base == UD_NONE && op->index == UD_NONE) {
uint64_t v;
UD_ASSERT(op->scale == UD_NONE && op->offset != 8);
/* unsigned mem-offset */
switch (op->offset) {
case 16: v = op->lval.uword; break;
case 32: v = op->lval.udword; break;
case 64: v = op->lval.uqword; break;
default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */
}
ud_asmprintf(u, "0x%" FMT64 "x", v);
} else {
int64_t v;
UD_ASSERT(op->offset != 64);
switch (op->offset) {
case 8 : v = op->lval.sbyte; break;
case 16: v = op->lval.sword; break;
case 32: v = op->lval.sdword; break;
default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */
}
if (v < 0) {
ud_asmprintf(u, "-0x%" FMT64 "x", -v);
} else if (v > 0) {
ud_asmprintf(u, "%s0x%" FMT64 "x", sign? "+" : "", v);
}
}
}
/* -----------------------------------------------------------------------------
* decode_gpr() - Returns decoded General Purpose Register
* -----------------------------------------------------------------------------
*/
static enum ud_type
decode_gpr(register struct ud* u, unsigned int s, unsigned char rm)
{
switch (s) {
case 64:
return UD_R_RAX + rm;
case 32:
return UD_R_EAX + rm;
case 16:
return UD_R_AX + rm;
case 8:
if (u->dis_mode == 64 && u->pfx_rex) {
if (rm >= 4)
return UD_R_SPL + (rm-4);
return UD_R_AL + rm;
} else return UD_R_AL + rm;
case 0:
/* invalid size in case of a decode error */
UD_ASSERT(u->error);
return UD_NONE;
default:
UD_ASSERT(!"invalid operand size");
return UD_NONE;
}
}
/*
* decode_3dnow()
*
* Decoding 3dnow is a little tricky because of its strange opcode
* structure. The final opcode disambiguation depends on the last
* byte that comes after the operands have been decoded. Fortunately,
* all 3dnow instructions have the same set of operand types. So we
* go ahead and decode the instruction by picking an arbitrarily chosen
* valid entry in the table, decode the operands, and read the final
* byte to resolve the menmonic.
*/
static inline int
decode_3dnow(struct ud* u)
{
uint16_t ptr;
UD_ASSERT(u->le->type == UD_TAB__OPC_3DNOW);
UD_ASSERT(u->le->table[0xc] != 0);
decode_insn(u, u->le->table[0xc]);
inp_next(u);
if (u->error) {
return -1;
}
ptr = u->le->table[inp_curr(u)];
UD_ASSERT((ptr & 0x8000) == 0);
u->mnemonic = ud_itab[ptr].mnemonic;
return 0;
}
static void
decode_reg(struct ud *u,
struct ud_operand *opr,
int type,
int num,
int size)
{
int reg;
size = resolve_operand_size(u, size);
switch (type) {
case REGCLASS_GPR : reg = decode_gpr(u, size, num); break;
case REGCLASS_MMX : reg = UD_R_MM0 + (num & 7); break;
case REGCLASS_XMM : reg = UD_R_XMM0 + num; break;
case REGCLASS_CR : reg = UD_R_CR0 + num; break;
case REGCLASS_DB : reg = UD_R_DR0 + num; break;
case REGCLASS_SEG : {
/*
* Only 6 segment registers, anything else is an error.
*/
if ((num & 7) > 5) {
UDERR(u, "invalid segment register value\n");
return;
} else {
reg = UD_R_ES + (num & 7);
}
break;
}
default:
UD_ASSERT(!"invalid register type");
return;
}
opr->type = UD_OP_REG;
opr->base = reg;
opr->size = size;
}
/*
* decode_ext()
*
* Decode opcode extensions (if any)
*/
static int
decode_ext(struct ud *u, uint16_t ptr)
{
uint8_t idx = 0;
if ((ptr & 0x8000) == 0) {
return decode_insn(u, ptr);
}
u->le = &ud_lookup_table_list[(~0x8000 & ptr)];
if (u->le->type == UD_TAB__OPC_3DNOW) {
return decode_3dnow(u);
}
switch (u->le->type) {
case UD_TAB__OPC_MOD:
/* !11 = 0, 11 = 1 */
idx = (MODRM_MOD(modrm(u)) + 1) / 4;
break;
/* disassembly mode/operand size/address size based tables.
* 16 = 0,, 32 = 1, 64 = 2
*/
case UD_TAB__OPC_MODE:
idx = u->dis_mode != 64 ? 0 : 1;
break;
case UD_TAB__OPC_OSIZE:
idx = eff_opr_mode(u->dis_mode, REX_W(u->pfx_rex), u->pfx_opr) / 32;
break;
case UD_TAB__OPC_ASIZE:
idx = eff_adr_mode(u->dis_mode, u->pfx_adr) / 32;
break;
case UD_TAB__OPC_X87:
idx = modrm(u) - 0xC0;
break;
case UD_TAB__OPC_VENDOR:
if (u->vendor == UD_VENDOR_ANY) {
/* choose a valid entry */
idx = (u->le->table[idx] != 0) ? 0 : 1;
} else if (u->vendor == UD_VENDOR_AMD) {
idx = 0;
} else {
idx = 1;
}
break;
case UD_TAB__OPC_RM:
idx = MODRM_RM(modrm(u));
break;
case UD_TAB__OPC_REG:
idx = MODRM_REG(modrm(u));
break;
case UD_TAB__OPC_SSE:
return decode_ssepfx(u);
default:
UD_ASSERT(!"not reached");
break;
}
return decode_ext(u, u->le->table[idx]);
}
uint64_t
ud_syn_rel_target(struct ud *u, struct ud_operand *opr)
{
const uint64_t trunc_mask = 0xffffffffffffffffull >> (64 - u->opr_mode);
switch (opr->size) {
case 8 : return (u->pc + opr->lval.sbyte) & trunc_mask;
case 16: return (u->pc + opr->lval.sword) & trunc_mask;
case 32: return (u->pc + opr->lval.sdword) & trunc_mask;
default: UD_ASSERT(!"invalid relative offset size.");
}
}
static inline int
decode_insn(struct ud *u, uint16_t ptr)
{
UD_ASSERT((ptr & 0x8000) == 0);
u->itab_entry = &ud_itab[ ptr ];
u->mnemonic = u->itab_entry->mnemonic;
return (resolve_pfx_str(u) == 0 &&
resolve_mode(u) == 0 &&
decode_operands(u) == 0 &&
resolve_mnemonic(u) == 0) ? 0 : -1;
}
uint64_t
ud_syn_rel_target(struct ud *u, struct ud_operand *opr)
{
switch (opr->size) {
case 8 : return (u->pc + opr->lval.sbyte);
case 16: return (u->pc + opr->lval.sword);
case 32: return (u->pc + opr->lval.sdword);
default: UD_ASSERT(!"invalid relative offset size.");
return 0ull;
}
}
static inline int
eff_adr_mode(int dis_mode, int pfx_adr)
{
if (dis_mode == 64) {
return pfx_adr ? 32 : 64;
} else if (dis_mode == 32) {
return pfx_adr ? 16 : 32;
} else {
UD_ASSERT(dis_mode == 16);
return pfx_adr ? 32 : 16;
}
}
static inline int
eff_opr_mode(int dis_mode, int rex_w, int pfx_opr)
{
if (dis_mode == 64) {
return rex_w ? 64 : (pfx_opr ? 16 : 32);
} else if (dis_mode == 32) {
return pfx_opr ? 16 : 32;
} else {
UD_ASSERT(dis_mode == 16);
return pfx_opr ? 32 : 16;
}
}
static int
decode_opcode(struct ud *u)
{
uint16_t ptr;
UD_ASSERT(u->le->type == UD_TAB__OPC_TABLE);
UD_RETURN_ON_ERROR(u);
u->primary_opcode = inp_curr(u);
ptr = u->le->table[inp_curr(u)];
if (ptr & 0x8000) {
u->le = &ud_lookup_table_list[ptr & ~0x8000];
if (u->le->type == UD_TAB__OPC_TABLE) {
inp_next(u);
return decode_opcode(u);
}
}
return decode_ext(u, ptr);
}
