//========================================================================= //------------------------------------------------------------------------- __myevic__ void hidInit() { /* Init setup packet buffer */ /* Buffer range for setup packet -> [0 ~ 0x7] */ USBD->STBUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Interrupt IN endpoint, address 1 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | INT_IN_EP_NUM); /* Buffer range for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); /* EP3 ==> Interrupt OUT endpoint, address 2 */ USBD_CONFIG_EP(EP3, USBD_CFG_EPMODE_OUT | INT_OUT_EP_NUM); /* Buffer range for EP3 */ USBD_SET_EP_BUF_ADDR(EP3, EP3_BUF_BASE); /* trigger to receive OUT data */ USBD_SET_PAYLOAD_LEN(EP3, EP3_MAX_PKT_SIZE); }
/** * @brief USBD Endpoint Config. * @param None. * @retval None. */ void CCID_Init(void) { /* Init setup packet buffer */ /* Buffer for setup packet -> [0 ~ 0x7] */ USBD->BUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Bulk IN endpoint, address 2 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | BULK_IN_EP_NUM); /* Buffer offset for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); /* EP3 ==> Bulk Out endpoint, address 2 */ USBD_CONFIG_EP(EP3, USBD_CFG_EPMODE_OUT | BULK_OUT_EP_NUM); /* Buffer offset for EP3 */ USBD_SET_EP_BUF_ADDR(EP3, EP3_BUF_BASE); /* trigger receive OUT data */ USBD_SET_PAYLOAD_LEN(EP3, EP3_MAX_PKT_SIZE); /* EP4 ==> Interrupt IN endpoint, address 3 */ USBD_CONFIG_EP(EP4, USBD_CFG_EPMODE_IN | INT_IN_EP_NUM); /* Buffer offset for EP4 -> */ USBD_SET_EP_BUF_ADDR(EP4, EP4_BUF_BASE); /* check card state */ gu8IsDeviceReady = 1; pu8IntInBuf = &UsbIntMessageBuffer[0]; pUsbMessageBuffer = &UsbMessageBuffer[0]; RDR_to_PC_NotifySlotChange(); USBD_MemCopy((uint8_t *)(USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP4)), pu8IntInBuf, 2); USBD_SET_PAYLOAD_LEN(EP4, 2); }
void USB_VirtualCOM_Init() { // Initialize state USB_VirtualCOM_txQueue.head = USB_VirtualCOM_txQueue.tail = NULL; USB_VirtualCOM_bulkInWaiting = 1; USB_VirtualCOM_rxBuffer.readIndex = USB_VirtualCOM_rxBuffer.writeIndex = 0; USB_VirtualCOM_rxBuffer.dataSize = 0; USB_VirtualCOM_rxCallbackPtr = NULL; USB_VirtualCOM_isAsync = 0; // Open USB USBD_Open(&USB_VirtualCOM_UsbdInfo, USB_VirtualCOM_HandleClassRequest, NULL); // Initialize setup packet buffer USBD->STBUFSEG = USB_VCOM_SETUP_BUF_BASE; // Control IN endpoint USBD_CONFIG_EP(USB_VCOM_CTRL_IN_EP, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | USB_VCOM_CTRL_IN_EP_NUM); USBD_SET_EP_BUF_ADDR(USB_VCOM_CTRL_IN_EP, USB_VCOM_CTRL_IN_BUF_BASE); // Control OUT endpoint USBD_CONFIG_EP(USB_VCOM_CTRL_OUT_EP, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | USB_VCOM_CTRL_OUT_EP_NUM); USBD_SET_EP_BUF_ADDR(USB_VCOM_CTRL_OUT_EP, USB_VCOM_CTRL_OUT_BUF_BASE); // Bulk IN endpoint USBD_CONFIG_EP(USB_VCOM_BULK_IN_EP, USBD_CFG_EPMODE_IN | USB_VCOM_BULK_IN_EP_NUM); USBD_SET_EP_BUF_ADDR(USB_VCOM_BULK_IN_EP, USB_VCOM_BULK_IN_BUF_BASE); // Bulk OUT endpoint USBD_CONFIG_EP(USB_VCOM_BULK_OUT_EP, USBD_CFG_EPMODE_OUT | USB_VCOM_BULK_OUT_EP_NUM); USBD_SET_EP_BUF_ADDR(USB_VCOM_BULK_OUT_EP, USB_VCOM_BULK_OUT_BUF_BASE); USBD_SET_PAYLOAD_LEN(USB_VCOM_BULK_OUT_EP, USB_VCOM_BULK_OUT_MAX_PKT_SIZE); // Interrupt IN endpoint USBD_CONFIG_EP(USB_VCOM_INT_IN_EP, USBD_CFG_EPMODE_IN | USB_VCOM_INT_IN_EP_NUM); USBD_SET_EP_BUF_ADDR(USB_VCOM_INT_IN_EP, USB_VCOM_INT_IN_BUF_BASE); // Start USB USBD_Start(); // Enable USB interrupt NVIC_EnableIRQ(USBD_IRQn); }
void MSC_Init(void) { /* Init setup packet buffer */ /* Buffer range for setup packet -> [0 ~ 0x7] */ USBD->BUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Bulk IN endpoint, address 2 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | BULK_IN_EP_NUM); /* Buffer range for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); /* EP3 ==> Bulk Out endpoint, address 3 */ USBD_CONFIG_EP(EP3, USBD_CFG_EPMODE_OUT | BULK_OUT_EP_NUM); /* Buffer range for EP3 */ USBD_SET_EP_BUF_ADDR(EP3, EP3_BUF_BASE); /* trigger to receive OUT data */ USBD_SET_PAYLOAD_LEN(EP3, EP3_MAX_PKT_SIZE); /*****************************************************/ g_u32BulkBuf0 = EP3_BUF_BASE; g_u32BulkBuf1 = EP2_BUF_BASE; g_sCSW.dCSWSignature = CSW_SIGNATURE; g_TotalSectors = DATA_FLASH_STORAGE_SIZE / UDC_SECTOR_SIZE; }
/** * @brief USBD Endpoint Config. * @param None. * @retval None. */ void HID_Init(void) { /* Init setup packet buffer */ /* Buffer range for setup packet -> [0 ~ 0x7] */ USBD->STBUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Interrupt IN endpoint, address 1 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | INT_IN_EP_NUM); /* Buffer range for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); }
/** * @brief USBD Endpoint Config. * @param None. * @retval None. */ void PTR_Init(void) { /* Init setup packet buffer */ /* Buffer for setup packet -> [0 ~ 0x7] */ USBD->BUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Bulk IN endpoint, address 1 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | BULK_IN_EP_NUM); /* Buffer offset for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); /* EP3 ==> Bulk Out endpoint, address 2 */ USBD_CONFIG_EP(EP3, USBD_CFG_EPMODE_OUT | BULK_OUT_EP_NUM); /* Buffer offset for EP3 */ USBD_SET_EP_BUF_ADDR(EP3, EP3_BUF_BASE); /* trigger receive OUT data */ USBD_SET_PAYLOAD_LEN(EP3, EP3_MAX_PKT_SIZE); /* EP4 ==> Interrupt IN endpoint, address 3 */ USBD_CONFIG_EP(EP4, USBD_CFG_EPMODE_IN | INT_IN_EP_NUM); /* Buffer offset for EP4 -> */ USBD_SET_EP_BUF_ADDR(EP4, EP4_BUF_BASE); /*****************************************************/ /* EP5 ==> Interrupt IN endpoint, address 4 */ USBD_CONFIG_EP(EP5, USBD_CFG_EPMODE_IN | INT_IN_EP_NUM_1); /* Buffer range for EP5 */ USBD_SET_EP_BUF_ADDR(EP5, EP5_BUF_BASE); /* EP6 ==> Interrupt OUT endpoint, address 5 */ USBD_CONFIG_EP(EP6, USBD_CFG_EPMODE_OUT | INT_OUT_EP_NUM); /* Buffer range for EP6 */ USBD_SET_EP_BUF_ADDR(EP6, EP6_BUF_BASE); /* trigger to receive OUT data */ USBD_SET_PAYLOAD_LEN(EP6, EP6_MAX_PKT_SIZE); }
//========================================================================= //------------------------------------------------------------------------- __myevic__ void SetupEndpoints() { /* Init setup packet buffer */ /* Buffer range for setup packet -> [0 ~ 0x7] */ USBD->STBUFSEG = SETUP_BUF_BASE; /*****************************************************/ /* EP0 ==> control IN endpoint, address 0 */ USBD_CONFIG_EP(EP0, USBD_CFG_CSTALL | USBD_CFG_EPMODE_IN | 0); /* Buffer range for EP0 */ USBD_SET_EP_BUF_ADDR(EP0, EP0_BUF_BASE); /* EP1 ==> control OUT endpoint, address 0 */ USBD_CONFIG_EP(EP1, USBD_CFG_CSTALL | USBD_CFG_EPMODE_OUT | 0); /* Buffer range for EP1 */ USBD_SET_EP_BUF_ADDR(EP1, EP1_BUF_BASE); /*****************************************************/ /* EP2 ==> Interrupt IN endpoint, address 1 */ USBD_CONFIG_EP(EP2, USBD_CFG_EPMODE_IN | HID_INT_IN_EP_NUM); /* Buffer range for EP2 */ USBD_SET_EP_BUF_ADDR(EP2, EP2_BUF_BASE); /* EP3 ==> Interrupt OUT endpoint, address 2 */ USBD_CONFIG_EP(EP3, USBD_CFG_EPMODE_OUT | HID_INT_OUT_EP_NUM); /* Buffer range for EP3 */ USBD_SET_EP_BUF_ADDR(EP3, EP3_BUF_BASE); /* trigger to receive OUT data */ USBD_SET_PAYLOAD_LEN(EP3, EP3_MAX_PKT_SIZE); /*****************************************************/ if ( dfStatus.vcom ) { /* EP4 ==> Interrupt IN endpoint, address 3 */ USBD_CONFIG_EP(EP4, USBD_CFG_EPMODE_IN | VCOM_INT_IN_EP_NUM); /* Buffer offset for EP4 -> */ USBD_SET_EP_BUF_ADDR(EP4, EP4_BUF_BASE); /* EP5 ==> Bulk IN endpoint, address 1 */ USBD_CONFIG_EP(EP5, USBD_CFG_EPMODE_IN | VCOM_BULK_IN_EP_NUM); /* Buffer offset for EP5 */ USBD_SET_EP_BUF_ADDR(EP5, EP5_BUF_BASE); /* EP6 ==> Bulk Out endpoint, address 2 */ USBD_CONFIG_EP(EP6, USBD_CFG_EPMODE_OUT | VCOM_BULK_OUT_EP_NUM); /* Buffer offset for EP6 */ USBD_SET_EP_BUF_ADDR(EP6, EP6_BUF_BASE); /* trigger receive OUT data */ USBD_SET_PAYLOAD_LEN(EP6, EP6_MAX_PKT_SIZE); } else if ( dfStatus.storage ) { /* EP5 ==> Bulk IN endpoint, address 1 */ USBD_CONFIG_EP(EP5, USBD_CFG_EPMODE_IN | MSC_BULK_IN_EP_NUM); /* Buffer offset for EP5 */ USBD_SET_EP_BUF_ADDR(EP5, EP5_BUF_BASE); /* EP6 ==> Bulk Out endpoint, address 2 */ USBD_CONFIG_EP(EP6, USBD_CFG_EPMODE_OUT | MSC_BULK_OUT_EP_NUM); /* Buffer offset for EP6 */ USBD_SET_EP_BUF_ADDR(EP6, EP6_BUF_BASE); /* trigger receive OUT data */ USBD_SET_PAYLOAD_LEN(EP6, EP6_MAX_PKT_SIZE); } }