//-----------------------------------------------------------------------------
// \brief initialize the usb host and otg for use.
//
// \param none.
//
// \return uint32_t
// ERR_NO_ERROR - everything is ok...pmic ready to use.
// ERR_INIT_FAIL - something happened during initialization.
//-----------------------------------------------------------------------------
uint32_t USB_init(void)
{
uint32_t rtn = ERR_NO_ERROR;
// Unlock bootcfg registers
SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;
SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;
// Wake up USB module
// TODO: Check this against a 300MHz
SYSCONFIG->CFGCHIP[2] = 0x00002872; // Internal USB clock, 24MHz system clock, out of reset, force host
// Reset usb otg module
USB_OTG->CTRLR = 0x00000001;
// Wait for power off
printf("Waiting for VBUS low...\n");
USTIMER_delay(500000);
while ((SYSCONFIG->CFGCHIP[2] & 0x00010000) != 0);
// Start session
SETBIT(USB_OTG_DEVCTL, 0x00000001);
USTIMER_delay(500000);
printf("--> USB power enabled\n\nWaiting for VBUS high...\n");
if ((SYSCONFIG->CFGCHIP[2] & 0x00010000) == 0)
{
rtn = ERR_INIT_FAIL; // Fail
}
printf("--> VBUS is high.\n");
return (rtn);
}
//-----------------------------------------------------------------------------
// \brief write a string to the character lcd.
//
// \param uint8_t* charBuffer - .
//
// \param uint16_t bufferLen - .
//
// \param uint32_t charDelay - .
//
// \return none.
//-----------------------------------------------------------------------------
uint32_t LIDD_writeString(uint8_t* charBuffer, uint16_t bufferLen, uint32_t charDelay)
{
uint16_t bufferIndex;
for (bufferIndex = 0; bufferIndex < bufferLen; bufferIndex++)
{
LIDD_writeByte(LCD_DATA_REG, charBuffer[bufferIndex]);
if (charDelay > 0)
{
USTIMER_delay(charDelay);
}
}
return (ERR_NO_ERROR);
}
//-----------------------------------------------------------------------------
// \brief initialize the given spi port.
//
// \param spi_regs_t *spi - pointer to reg struct for the desired spi port.
//
// \param spi_config_t *in_config - desired spi configuration.
//
// \return uint32_t
// ERR_NO_ERROR - everything is ok...spi ready to use.
// ERR_INIT_FAIL - something happened during initialization.
//-----------------------------------------------------------------------------
uint32_t SPI_init(spi_regs_t *spi, spi_config_t *in_config)
{
uint32_t rtn = ERR_INIT_FAIL;
// enable the psc and config pinmux for the given spi port.
switch ((uint32_t)spi)
{
case SPI0_REG_BASE:
EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_SPI0, PSC_ENABLE);
EVMOMAPL138_pinmuxConfig(PINMUX_SPI0_REG_0, PINMUX_SPI0_MASK_0, PINMUX_SPI0_VAL_0);
EVMOMAPL138_pinmuxConfig(PINMUX_SPI0_REG_1, PINMUX_SPI0_MASK_1, PINMUX_SPI0_VAL_1);
break;
case SPI1_REG_BASE:
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_SPI1, PSC_ENABLE);
EVMOMAPL138_pinmuxConfig(PINMUX_SPI1_REG, PINMUX_SPI1_MASK, PINMUX_SPI1_VAL);
break;
default:
return (ERR_INIT_FAIL);
}
if (in_config != NULL)
{
uint32_t prescaler;
// reset spi port.
spi->SPIGCR0 = 0;
USTIMER_delay(5);
SETBIT(spi->SPIGCR0, RESET);
// config master/slave mode.
if (SPI_MODE_MASTER == in_config->mode)
{
// set clkmod and master for master mode.
spi->SPIGCR1 = CLKMOD | MASTER;
}
else if (SPI_MODE_SLAVE == in_config->mode)
{
// clear spigcr1 for slave mode.
spi->SPIGCR1 = 0;
}
else
{
return (ERR_INIT_FAIL);
}
// config pin options.
switch (in_config->pin_option)
{
case SPI_3PIN:
// enable spi SOMI, SIMO, and CLK.
spi->SPIPC0 = SOMI | SIMO | CLK;
// config SCS0 as gpio output.
SETBIT(spi->SPIPC1, SCS0);
break;
case SPI_4PIN_CS:
// enable spi SOMI, SIMO, CLK, and SCS0.
spi->SPIPC0 = SOMI | SIMO | CLK | SCS0;
break;
case SPI_4PIN_EN:
// enable spi SOMI, SIMO, CLK, and ENA.
spi->SPIPC0 = SOMI | SIMO | CLK | ENA;
break;
case SPI_5PIN:
// enable spi SOMI, SIMO, CLK, SCS0, and ENA.
spi->SPIPC0 = SOMI | SIMO | CLK | ENA | SCS0;
break;
default:
return (ERR_INIT_FAIL);
}
// config the cs active...high or low.
spi->SPIDEF = 0;
if (SPI_CS_ACTIVE_LOW == in_config->cs_active)
{
// clear csnr for active low and set cs default to 1.
spi->SPIDAT1 = 0;
SETBIT(spi->SPIDEF, CSDEF0);
}
else if (SPI_CS_ACTIVE_HIGH == in_config->cs_active)
{
// set csnr for active high and set cs default to 0.
spi->SPIDAT1 = 0;
SETBIT(spi->SPIDAT1, CSNR);
}
else
{
return (ERR_INIT_FAIL);
}
// config spi direction, polarity, and phase.
spi->SPIFMT0 = 0;
if (SPI_SHIFT_LSB == in_config->shift_dir)
{
SETBIT(spi->SPIFMT0, SHIFTDIR);
}
if (in_config->polarity)
{
SETBIT(spi->SPIFMT0, POLARITY);
}
if (in_config->phase)
{
SETBIT(spi->SPIFMT0, PHASE);
}
// set the prescaler and character length.
prescaler = (((SYSCLOCK2_HZ / in_config->freq) - 1) & 0xFF);
#ifdef DEBUG
printf("desired spi freq: %u\r\n", in_config->freq);
printf("spi sysclock: %u\r\n", SYSCLOCK2_HZ);
printf("prescaler set to: %u\r\n", prescaler);
#endif
SETBIT(spi->SPIFMT0, (prescaler << SHIFT_PRESCALE));
SETBIT(spi->SPIFMT0, (DEFAULT_CHAR_LEN << SHIFT_CHARLEN));
spi->SPIDELAY = (8 << 24) | (8 << 16);
// disable interrupts.
spi->SPIINT = 0x00;
spi->SPILVL = 0x00;
// enable spi.
SETBIT(spi->SPIGCR1, ENABLE);
rtn = ERR_NO_ERROR;
}
return (rtn);
}
Void main()
{
int i = 0;
// unlock the system config registers.
SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;
SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;
SYSCONFIG1->PUPD_SEL |= 0x10000000; // change pin group 28 to pullup for GP7[12/13] (LCD switches)
// Initially set McBSP1 pins as GPIO ins
CLRBIT(SYSCONFIG->PINMUX[1], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[1], 0x88888880); // This is enabling the McBSP1 pins
CLRBIT(SYSCONFIG->PINMUX[16], 0xFFFF0000);
SETBIT(SYSCONFIG->PINMUX[16], 0x88880000); // setup GP7.8 through GP7.13
CLRBIT(SYSCONFIG->PINMUX[17], 0x000000FF);
SETBIT(SYSCONFIG->PINMUX[17], 0x00000088); // setup GP7.8 through GP7.13
//Rick added for LCD DMA flagging test
GPIO_setDir(GPIO_BANK0, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setOutput(GPIO_BANK0, GPIO_PIN8, OUTPUT_HIGH);
GPIO_setDir(GPIO_BANK0, GPIO_PIN0, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN1, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN2, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN3, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN4, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN5, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN6, GPIO_INPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN9, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN10, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN11, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN12, GPIO_INPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN13, GPIO_INPUT);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN8, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN9, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN10, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN11, OUTPUT_HIGH);
CLRBIT(SYSCONFIG->PINMUX[13], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[13], 0x88888811); //Set GPIO 6.8-13 to GPIOs and IMPORTANT Sets GP6[15] to /RESETOUT used by PHY, GP6[14] CLKOUT appears unconnected
#warn GP6.15 is also connected to CAMERA RESET This is a Bug in my board design Need to change Camera Reset to different IO.
GPIO_setDir(GPIO_BANK6, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN9, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN10, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN11, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN12, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN13, GPIO_INPUT);
// on power up wait until Linux has initialized Timer1
while ((T1_TGCR & 0x7) != 0x7) {
for (index=0;index<50000;index++) {} // small delay before checking again
}
USTIMER_init();
// Turn on McBSP1
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP1, PSC_ENABLE);
// If Linux has already booted It sets a flag so no need to delay
if ( GET_ISLINUX_BOOTED == 0) {
USTIMER_delay(4*DELAY_1_SEC); // delay allowing Linux to partially boot before continuing with DSP code
}
// init the us timer and i2c for all to use.
I2C_init(I2C0, I2C_CLK_100K);
init_ColorVision();
init_LCD_mem(); // added rick
EVTCLR0 = 0xFFFFFFFF;
EVTCLR1 = 0xFFFFFFFF;
EVTCLR2 = 0xFFFFFFFF;
EVTCLR3 = 0xFFFFFFFF;
init_DMA();
init_McBSP();
init_LADAR();
CLRBIT(SYSCONFIG->PINMUX[1], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[1], 0x22222220); // This is enabling the McBSP1 pins
CLRBIT(SYSCONFIG->PINMUX[5], 0x00FF0FFF);
SETBIT(SYSCONFIG->PINMUX[5], 0x00110111); // This is enabling SPI pins
CLRBIT(SYSCONFIG->PINMUX[16], 0xFFFF0000);
SETBIT(SYSCONFIG->PINMUX[16], 0x88880000); // setup GP7.8 through GP7.13
CLRBIT(SYSCONFIG->PINMUX[17], 0x000000FF);
SETBIT(SYSCONFIG->PINMUX[17], 0x00000088); // setup GP7.8 through GP7.13
init_LCD();
LADARps.x = 3.5/12; // 3.5/12 for front mounting
LADARps.y = 0;
LADARps.theta = 1; // not inverted
OPTITRACKps.x = 0;
OPTITRACKps.y = 0;
OPTITRACKps.theta = 0;
for(i = 0;i<LADAR_MAX_DATA_SIZE;i++)
{ LADARdistance[i] = LADAR_MAX_READING; } //initialize all readings to max value.
// ROBOTps will be updated by Optitrack during gyro calibration
// TODO: specify the starting position of the robot
ROBOTps.x = 0; //the estimate in array form (useful for matrix operations)
ROBOTps.y = 0;
ROBOTps.theta = 0; // was -PI: need to flip OT ground plane to fix this
// flag pins
GPIO_setDir(IMAGE_TO_LINUX_BANK, IMAGE_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(OPTITRACKDATA_FROM_LINUX_BANK, OPTITRACKDATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATA_TO_LINUX_BANK, DATA_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATA_FROM_LINUX_BANK, DATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATAFORFILE_TO_LINUX_BANK, DATAFORFILE_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(LVDATA_FROM_LINUX_BANK, LVDATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(LVDATA_TO_LINUX_BANK, LVDATA_TO_LINUX_FLAG, GPIO_OUTPUT);
CLR_OPTITRACKDATA_FROM_LINUX; // Clear = tell linux DSP is ready for new Opitrack data
CLR_DATA_FROM_LINUX; // Clear = tell linux that DSP is ready for new data
CLR_DATAFORFILE_TO_LINUX; // Clear = linux not requesting data
SET_DATA_TO_LINUX; // Set = put float array data into shared memory for linux
SET_IMAGE_TO_LINUX; // Set = put image into shared memory for linux
CLR_LVDATA_FROM_LINUX; // Clear = tell linux that DSP is ready for new LV data
SET_LVDATA_TO_LINUX; // Set = put LV char data into shared memory for linux
// clear all possible EDMA
EDMA3_0_Regs->SHADOW[1].ICR = 0xFFFFFFFF;
// Add your init code here
}
