.size = sizeof(uint8_t), \ .flags = VMS_ARRAY | VMS_POINTER, \ .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ } const VMStateDescription vmstate_ich9_pm = { .name = "ich9_pm", .version_id = 1, .minimum_version_id = 1, .minimum_version_id_old = 1, .post_load = ich9_pm_post_load, .fields = (VMStateField[]) { VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs), VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs), VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs), VMSTATE_TIMER(acpi_regs.tmr.timer, ICH9LPCPMRegs), VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs), VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs), VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs), VMSTATE_UINT32(smi_en, ICH9LPCPMRegs), VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs), VMSTATE_END_OF_LIST() } }; static void pm_reset(void *opaque) { ICH9LPCPMRegs *pm = opaque; ich9_pm_iospace_update(pm, 0); acpi_pm1_evt_reset(&pm->acpi_regs);
.name = "mc146818rtc", .version_id = 2, .minimum_version_id = 1, .minimum_version_id_old = 1, .post_load = rtc_post_load, .fields = (VMStateField []) { VMSTATE_BUFFER(cmos_data, RTCState), VMSTATE_UINT8(cmos_index, RTCState), VMSTATE_INT32(current_tm.tm_sec, RTCState), VMSTATE_INT32(current_tm.tm_min, RTCState), VMSTATE_INT32(current_tm.tm_hour, RTCState), VMSTATE_INT32(current_tm.tm_wday, RTCState), VMSTATE_INT32(current_tm.tm_mday, RTCState), VMSTATE_INT32(current_tm.tm_mon, RTCState), VMSTATE_INT32(current_tm.tm_year, RTCState), VMSTATE_TIMER(periodic_timer, RTCState), VMSTATE_INT64(next_periodic_time, RTCState), VMSTATE_INT64(next_second_time, RTCState), VMSTATE_TIMER(second_timer, RTCState), VMSTATE_TIMER(second_timer2, RTCState), VMSTATE_UINT32_V(irq_coalesced, RTCState, 2), VMSTATE_UINT32_V(period, RTCState, 2), VMSTATE_END_OF_LIST() } }; static void rtc_reset(void *opaque) { RTCState *s = opaque; s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
uart_update_status(s); return 0; } static const VMStateDescription vmstate_cadence_uart = { .name = "cadence_uart", .version_id = 1, .minimum_version_id = 1, .minimum_version_id_old = 1, .post_load = cadence_uart_post_load, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(r, UartState, R_MAX), VMSTATE_UINT8_ARRAY(r_fifo, UartState, RX_FIFO_SIZE), VMSTATE_UINT32(rx_count, UartState), VMSTATE_UINT32(rx_wpos, UartState), VMSTATE_TIMER(fifo_trigger_handle, UartState), VMSTATE_TIMER(tx_time_handle, UartState), VMSTATE_END_OF_LIST() } }; static void cadence_uart_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); sdc->init = cadence_uart_init; dc->vmsd = &vmstate_cadence_uart; } static const TypeInfo cadence_uart_info = {
return 0; } static const VMStateDescription vmstate_cadence_uart = { .name = "cadence_uart", .version_id = 2, .minimum_version_id = 2, .post_load = cadence_uart_post_load, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(r, UartState, R_MAX), VMSTATE_UINT8_ARRAY(rx_fifo, UartState, RX_FIFO_SIZE), VMSTATE_UINT8_ARRAY(tx_fifo, UartState, RX_FIFO_SIZE), VMSTATE_UINT32(rx_count, UartState), VMSTATE_UINT32(tx_count, UartState), VMSTATE_UINT32(rx_wpos, UartState), VMSTATE_TIMER(fifo_trigger_handle, UartState), VMSTATE_END_OF_LIST() } }; static void cadence_uart_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); sdc->init = cadence_uart_init; dc->vmsd = &vmstate_cadence_uart; dc->reset = cadence_uart_reset; } static const TypeInfo cadence_uart_info = {
* has never changed and thus can accept all past versions. * * For future changes we can treat these values as we normally would. */ .version_id = 10000, .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField []) { VMSTATE_PCI_DEVICE(dev, I6300State), VMSTATE_INT32(reboot_enabled, I6300State), VMSTATE_INT32(clock_scale, I6300State), VMSTATE_INT32(int_type, I6300State), VMSTATE_INT32(free_run, I6300State), VMSTATE_INT32(locked, I6300State), VMSTATE_INT32(enabled, I6300State), VMSTATE_TIMER(timer, I6300State), VMSTATE_UINT32(timer1_preload, I6300State), VMSTATE_UINT32(timer2_preload, I6300State), VMSTATE_INT32(stage, I6300State), VMSTATE_INT32(unlock_state, I6300State), VMSTATE_INT32(previous_reboot_flag, I6300State), VMSTATE_END_OF_LIST() } }; static int i6300esb_init(PCIDevice *dev) { I6300State *d = DO_UPCAST(I6300State, dev, dev); i6300esb_debug("I6300State = %p\n", d);
} #endif return 0; } static const VMStateDescription vmstate_rtc = { .name = "mc146818rtc", .version_id = 3, .minimum_version_id = 1, .minimum_version_id_old = 1, .post_load = rtc_post_load, .fields = (VMStateField []) { VMSTATE_BUFFER(cmos_data, RTCState), VMSTATE_UINT8(cmos_index, RTCState), VMSTATE_UNUSED(7*4), VMSTATE_TIMER(periodic_timer, RTCState), VMSTATE_INT64(next_periodic_time, RTCState), VMSTATE_UNUSED(3*8), VMSTATE_UINT32_V(irq_coalesced, RTCState, 2), VMSTATE_UINT32_V(period, RTCState, 2), VMSTATE_UINT64_V(base_rtc, RTCState, 3), VMSTATE_UINT64_V(last_update, RTCState, 3), VMSTATE_INT64_V(offset, RTCState, 3), VMSTATE_TIMER_V(update_timer, RTCState, 3), VMSTATE_UINT64_V(next_alarm_time, RTCState, 3), VMSTATE_END_OF_LIST() } }; static void rtc_notify_clock_reset(Notifier *notifier, void *data) {