static int ipu_adc_write_cmd(cmddata_t type,uint32_t data)
{
int result=EINKFB_SUCCESS;
if(type==CMD)
{
udelay(1);
LOW_HDC_PIN;
}
WR_GPIO_LINE(bsaddr,data)
udelay(1);
HIGH_HDC_PIN;
return result;
}
bool bs_hw_init(void)
{
bool result = true;
#ifdef USE_BS_IRQ
int rqstatus;
#endif
ipu_adc_sig_cfg_t sig = { 0, 0, 0, 0, 0, 0, 0, 0,
IPU_ADC_BURST_WCS,
IPU_ADC_IFC_MODE_SYS80_TYPE2,
16, 0, 0, IPU_ADC_SER_NO_RW
};
// Init DI interface
if ( IS_NELL() || IS_MARIO() || IS_ADS() )
{
broadsheet_screen_height = BROADSHEET_SCREEN_HEIGHT_NELL;
broadsheet_screen_width = BROADSHEET_SCREEN_WIDTH_NELL;
broadsheet_screen_size = BROADSHEET_SCREEN_SIZE_NELL;
}
ipu_adc_init_panel(BROADSHEET_DISPLAY_NUMBER,
broadsheet_screen_width,
broadsheet_screen_height,
BROADSHEET_PIXEL_FORMAT, broadsheet_screen_size, sig, XY, 0, VsyncInternal);
// Set IPU timing for read cycles
ipu_adc_init_ifc_timing(BROADSHEET_DISPLAY_NUMBER, true,
BROADSHEET_READ_CYCLE_TIME,
BROADSHEET_READ_UP_TIME,
BROADSHEET_READ_DOWN_TIME,
BROADSHEET_READ_LATCH_TIME,
BROADSHEET_PIXEL_CLK);
// Set IPU timing for write cycles
ipu_adc_init_ifc_timing(BROADSHEET_DISPLAY_NUMBER, false,
BROADSHEET_WRITE_CYCLE_TIME,
BROADSHEET_WRITE_UP_TIME,
BROADSHEET_WRITE_DOWN_TIME,
0, 0);
ipu_adc_set_update_mode(ADC_SYS1, IPU_ADC_REFRESH_NONE, 0, 0, 0);
gpio_lcd_active();
slcd_gpio_config();
#ifdef CONFIG_MACH_MX31ADS
// Reset the level translator for the two GPIO inputs (HIRQ and HRDY)
pin_addr = PBC_BCTRL2_LDCIO_EN;
__raw_writew(pin_addr, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR);
#endif
#ifdef USE_BS_IRQ
// Set up IRQ for for Broadsheet HIRQ line
disable_irq(BROADSHEET_HIRQ_IRQ);
set_irq_type(BROADSHEET_HIRQ_IRQ, IRQF_TRIGGER_RISING);
rqstatus = request_irq(BROADSHEET_HIRQ_IRQ, (irq_handler_t) bs_irq_handler, 0, "eink_fb_hal_broads", NULL);
if (rqstatus != 0) {
einkfb_print_crit("Failed IRQ request for Broadsheet HIRQ line; request status = %d\n", rqstatus);
result = false;
}
#endif
// Set up GPIO pins
if (mxc_request_gpio(BROADSHEET_HIRQ_LINE)) {
einkfb_print_crit("Could not obtain GPIO pin for HIRQ\n");
result = false;
}
else {
// Set HIRQ pin as input
mxc_set_gpio_direction(BROADSHEET_HIRQ_LINE, 1);
}
if (mxc_request_gpio(BROADSHEET_HRDY_LINE)) {
einkfb_print_crit("Could not obtain GPIO pin for HRDY\n");
result = false;
}
else {
// Set HRDY pin as input
mxc_set_gpio_direction(BROADSHEET_HRDY_LINE, 1);
}
#ifdef CONFIG_MACH_MARIO_MX
if (mxc_request_gpio(BROADSHEET_RST_LINE)) {
einkfb_print_crit("Could not obtain GPIO pin for RST\n");
result = false;
}
else {
// Set RST pin as output and initialize to zero (it's active LOW)
mxc_set_gpio_direction(BROADSHEET_RST_LINE, 0);
mxc_set_gpio_dataout(BROADSHEET_RST_LINE, 0);
}
#endif
#ifdef CONFIG_MACH_MX31ADS
// Enable the level translator for the two GPIO inputs (HIRQ and HRDY)
mdelay(100); // Pause 100 ms to allow level translator to settle
pin_addr = PBC_BCTRL2_LDCIO_EN;
__raw_writew(pin_addr, PBC_BASE_ADDRESS + PBC_BCTRL2_SET);
#endif
// Reset Broadsheet
einkfb_debug("Sending RST signal to Broadsheet...\n");
WR_GPIO_LINE(BROADSHEET_RST_LINE, BROADSHEET_RESET_VAL); // Assert RST
mdelay(100); // Pause 100 ms during reset
WR_GPIO_LINE(BROADSHEET_RST_LINE, BROADSHEET_NON_RESET_VAL); // Clear RST
mdelay(400); // Pause 400 ms to allow Broasheet time to come up
einkfb_debug("Broadsheet reset done.\n");
#ifdef TEST_BROADSHEET
test_broadsheet(disp);
#endif
#ifdef USE_BS_IRQ
// Set up Broadsheet for interrupt generation (enable all conditions)
bs_cmd_wr_reg(BS_INTR_CTL_REG, BS_ALL_IRQS);
bs_cmd_wr_reg(BS_INTR_RAW_STATUS_REG, BS_ALL_IRQS);
// Enable all Broadsheet display engine interrupts
bs_cmd_wr_reg(BS_DE_INTR_ENABLE_REG, BS_DE_ALL_IRQS);
bs_cmd_wr_reg(BS_DE_INTR_RAW_STATUS_REG, BS_DE_ALL_IRQS);
#endif
einkfb_debug("GPIOs and IRQ set; Broadsheet has been reset\n");
return ( result );
}
