/**
*
* This function reads the values of the Acceptance Filter Mask and ID Register
* for the specified Acceptance Filter. Use XCAN_IDR_* defined in xcan_l.h to
* interpret the values. Read xcan.h and device specification for details.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
* @param FilterIndex defines which Acceptance Filter Mask Register to get
* Mask and ID from. Use any single XCAN_FILTER_* value.
* @param MaskValue will store the Mask value read from the chosen
* Acceptance Filter Mask Register after this function returns.
* @param IdValue will store the ID value read from the chosen Acceptance
* Filter ID Register after this function returns.
*
* @return None.
*
* @note
*
* Acceptance Filter Mask and ID Registers are optional registers in Xilinx CAN
* device. If they are NOT existing in the device, this function should NOT
* be used. Calling this function in this case will cause an assertion failure.
*
******************************************************************************/
void XCan_AcceptFilterGet(XCan *InstancePtr, u32 FilterIndex,
u32 *MaskValue, u32 *IdValue)
{
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(InstancePtr->NumOfAcceptFilters > 0);
Xil_AssertVoid((FilterIndex == XCAN_AFR_UAF4_MASK) ||
(FilterIndex == XCAN_AFR_UAF3_MASK) ||
(FilterIndex == XCAN_AFR_UAF2_MASK) ||
(FilterIndex == XCAN_AFR_UAF1_MASK));
switch (FilterIndex) {
case XCAN_AFR_UAF1_MASK: /* Acceptance Filter No. 1 */
/* Read Mask Register */
*MaskValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFMR1_OFFSET);
/* Read ID Register */
*IdValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFIR1_OFFSET);
break;
case XCAN_AFR_UAF2_MASK: /* Acceptance Filter No. 2 */
/* Read Mask Register */
*MaskValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFMR2_OFFSET);
/* Read ID Register */
*IdValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFIR2_OFFSET);
break;
case XCAN_AFR_UAF3_MASK: /* Acceptance Filter No. 3 */
/* Read Mask Register */
*MaskValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFMR3_OFFSET);
/* Read ID Register */
*IdValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFIR3_OFFSET);
break;
case XCAN_AFR_UAF4_MASK: /* Acceptance Filter No. 4 */
/* Read Mask Register */
*MaskValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFMR4_OFFSET);
/* Read ID Register */
*IdValue =
XCan_ReadReg(InstancePtr->BaseAddress,
XCAN_AFIR4_OFFSET);
break;
}
}
/**
*
* This function reads Error Status value from Error Status Register (ESR). Use
* the XCAN_ESR_* constants defined in xcan_l.h to interpret the returned value.
*
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
*
* @return The 32-bit value read from Error Status Register.
*
* @note None.
*
******************************************************************************/
u32 XCan_GetBusErrorStatus(XCan *InstancePtr)
{
u32 Result;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Result = XCan_ReadReg(InstancePtr->BaseAddress, XCAN_ESR_OFFSET);
return Result;
}
/**
*
* This routine returns enabled interrupt(s). Use the XCAN_IXR_* constants
* defined in xcan_l.h to interpret the returned value.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
*
* @return Enabled interrupt(s) in a 32-bit format.
*
* @note None.
*
*****************************************************************************/
u32 XCan_InterruptGetEnabled(XCan *InstancePtr)
{
u32 Result;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Result = XCan_ReadReg(InstancePtr->BaseAddress, XCAN_IER_OFFSET);
return Result;
}
/**
*
* This function returns enabled acceptance filters. Use XCAN_AFR_UAF*_MASK
* defined in xcan_l.h to interpret the returned value. If no acceptance filters
* are enabled then all received frames are stored in the RX FIFO.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
*
* @return The value stored in Acceptance Filter Register.
*
* @note
*
* Acceptance Filter Register is an optional register in Xilinx CAN device.
* If it is NOT existing in the device, this function should NOT be used.
* Calling this function in this case will cause an assertion failure.
*
******************************************************************************/
u32 XCan_AcceptFilterGetEnabled(XCan *InstancePtr)
{
u32 Result;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertNonvoid(InstancePtr->NumOfAcceptFilters > 0);
Result = XCan_ReadReg(InstancePtr->BaseAddress, XCAN_AFR_OFFSET);
return Result;
}
/**
*
* This function reads Receive and Transmit error counters.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
* @param RxErrorCount will contain Receive Error Counter value after this
* function returns.
* @param TxErrorCount will contain Transmit Error Counter value after
* this function returns.
*
* @return None.
*
* @note None.
*
******************************************************************************/
void XCan_GetBusErrorCounter(XCan *InstancePtr, u8 *RxErrorCount,
u8 *TxErrorCount)
{
u32 Result;
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/* Read Error Counter Register and parse it. */
Result = XCan_ReadReg(InstancePtr->BaseAddress, XCAN_ECR_OFFSET);
*RxErrorCount = (Result & XCAN_ECR_REC_MASK) >> XCAN_ECR_REC_SHIFT;
*TxErrorCount = Result & XCAN_ECR_TEC_MASK;
}
/**
*
* This function receives a CAN Frame. This function first checks if RX FIFO is
* empty, if not, it then reads a frame from the RX FIFO into the given buffer.
* This function returns error code immediately if there is no frame in the RX
* FIFO.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
* @param FramePtr is a pointer to a 32-bit aligned buffer where the CAN
* frame to be written.
*
* @return
* - XST_SUCCESS if RX FIFO was not empty and a frame was read from
* RX FIFO successfully and written into the given buffer;
* - XST_NO_DATA if there is no frame to be received from the FIFO
*
* @note None.
*
******************************************************************************/
int XCan_Recv(XCan *InstancePtr, u32 *FramePtr)
{
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Check if RX FIFO has frame(s) sitting in it. If not, return error
* code
*/
if (XCan_IsRxEmpty(InstancePtr) == TRUE) {
return XST_NO_DATA;
}
/* Read IDR */
FramePtr[0] =
XCan_ReadReg(InstancePtr->BaseAddress, XCAN_RXFIFO_ID_OFFSET);
/* Read DLC */
FramePtr[1] =
XCan_ReadReg(InstancePtr->BaseAddress, XCAN_RXFIFO_DLC_OFFSET);
/* Read Data Word 1 */
FramePtr[2] =
XCan_ReadReg(InstancePtr->BaseAddress, XCAN_RXFIFO_DW1_OFFSET);
/* Read Data Word 2 */
FramePtr[3] =
XCan_ReadReg(InstancePtr->BaseAddress, XCAN_RXFIFO_DW2_OFFSET);
/*
* Clear RXNEMP bit in ISR. This allows future XCan_IsRxEmpty() call
* returns correct RX FIFO occupancy/empty condition.
*/
XCan_InterruptClear(InstancePtr, XCAN_IXR_RXNEMP_MASK);
return XST_SUCCESS;
}
/**
*
* This routine disables individual acceptance filters. Up to 4 filters could
* be disabled. If all acceptance filters are disabled then all received frames
* are stored in the RX FIFO.
*
* @param InstancePtr is a pointer to the XCan instance to be worked on.
* @param FilterIndexes specifies which filter(s) to disable. Use
* any XCAN_AFR_UAF*_MASK to disable one filter, and "Or" multiple
* XCAN_AFR_UAF*_MASK values if multiple filters need to be
* disabled. Any filter not specified in this parameter will keep
* its previous enable/disable setting. If all acceptance filters
* are disabled then all received frames are stored in the RX FIFO.
*
* @return None.
*
* @note
*
* Acceptance Filter Register is an optional register in Xilinx CAN device.
* If it is NOT existing in the device, this function should NOT be used.
* Calling this function in this case will cause an assertion failure.
*
******************************************************************************/
void XCan_AcceptFilterDisable(XCan *InstancePtr, u32 FilterIndexes)
{
u32 EnabledFilters;
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(InstancePtr->NumOfAcceptFilters > 0);
/*
* Read the currently enabled filters from Acceptance Filter
* Register(AFR), which defines which filters are enabled/disabled.
*/
EnabledFilters =
XCan_ReadReg(InstancePtr->BaseAddress, XCAN_AFR_OFFSET);
/* Calculate new value to write to AFR */
EnabledFilters &= XCAN_AFR_UAF_ALL_MASK & (~FilterIndexes);
/* Write AFR */
XCan_WriteReg(InstancePtr->BaseAddress, XCAN_AFR_OFFSET,
EnabledFilters);
}