Пример #1
0
/***************************************************************************
*  This is the main thread that will do all initializations.
*  It will call configure functions for all subsystems and system level
*  peripherals
***************************************************************************/
int main(void)
{
  XPeriph *PeriphPtr;
  XVprocSs *VpssPtr;
  int status;
  u32 Timeout;
  static int Lock = FALSE;

  /* Bind instance pointer with definition */
  PeriphPtr = &PeriphInst;
  VpssPtr   = &VprocInst;

  /* Initialize ICache */
  Xil_ICacheInvalidate();
  Xil_ICacheEnable();

  /* Initialize DCache */
  Xil_DCacheInvalidate();
  Xil_DCacheEnable();


  xil_printf("\r\n--------------------------------------------------------\r\n");
  xil_printf("  Video Processing Subsystem Example Design %s\r\n", XVPROCSS_SW_VER);
  xil_printf("  (c) 2015 by Xilinx Inc.\r\n");
  xil_printf("--------------------------------------------------------\r\n");

  xil_printf("\r\nInitialize System Design...\r\n");
  status = XSys_Init(PeriphPtr, VpssPtr);
  if(status != XST_SUCCESS)
  {
	 xil_printf("CRITICAL ERR:: System Init Failed. Cannot recover from this error. Check HW\n\r");
  }

#if (VERBOSE_MODE == 1)
  xil_printf("\r\nINFO> Setting up VPSS AXIS In/Out\r\n");
#endif
  //Set TPG default parameters
  XPeriph_SetTpgParams(PeriphPtr,
		               1920,
		               1080,
		               XVIDC_CSF_RGB,
		               XTPG_BKGND_COLOR_BARS,
		               FALSE);

  //Set AXIS In to TPG settings
  XSys_SetStreamParam(VpssPtr,
		              XSYS_VPSS_STREAM_IN,
		              PeriphInst.TpgConfig.Width,
		              PeriphInst.TpgConfig.Height,
		              PeriphInst.TpgConfig.ColorFmt,
		              PeriphInst.TpgConfig.IsInterlaced);

  if(VpssPtr->Config.Topology == XVPROCSS_TOPOLOGY_SCALER_ONLY)
  {
	/* Only Scaling Ratio can be changed. Stream out color format
	 * must be same as stream in
	 */
    //Set AXIS Out
    XSys_SetStreamParam(VpssPtr,
		                XSYS_VPSS_STREAM_OUT,
		                3840,
		                2160,
		                PeriphInst.TpgConfig.ColorFmt,
		                FALSE);
  }
  else //FULL_FLEDGED
  {
	//Set AXIS Out
	XSys_SetStreamParam(VpssPtr,
	                    XSYS_VPSS_STREAM_OUT,
			            3840,
			            2160,
			            XVIDC_CSF_YCRCB_422,
			            FALSE);
  }

  //Configure video processing subsystem
  status = XVprocSs_SetSubsystemConfig(VpssPtr);

  //Query vpss configuration
  XVprocSs_ReportSubsystemConfig(VpssPtr);

  if(status == XST_SUCCESS)
  {
    //Configure VTC with output timing
	XPeriph_ConfigVtc(PeriphPtr,
			          &VpssPtr->VidOut,
			          VprocInst.Config.PixPerClock);

    //Config TPG for AXIS In
    XPeriph_ConfigTpg(PeriphPtr);

#if (VERBOSE_MODE == 1)
    XPeriph_TpgDbgReportStatus(PeriphPtr);
#endif

    /* vtc is running at 9Mhz essentially providing < 2fps frame rate
     * Need to wait for 3-4 frames (~2sec) for vidout to acquire lock
     */
    xil_printf("\r\nWaiting for output to lock: ");
    MB_Sleep(2000);

    /* check for output lock */
    Timeout = VIDEO_MONITOR_LOCK_TIMEOUT;
    while(!Lock && Timeout)
    {
      if(XPeriph_IsVideoLocked(PeriphPtr))
      {
        xil_printf("Locked\r\n");
        Lock = TRUE;
      }
      --Timeout;
    }

    if(!Timeout)
    {
      xil_printf("\r\nTEST FAILED\r\n");
    }
    else
    {
      xil_printf("\r\nTEST PASSED\r\n");
    }
  }
  else
  {
    xil_printf("\r\nERR:: VProcss Configuration Failed. \r\n");
	xil_printf("\r\nTEST FAILED\r\n");
  }

  while(1)
  {
	 //NOP
  }

  /* Clean up DCache. For writeback caches, the disable_dcache routine
  internally does the flush and invalidate. For write through caches,
  an explicit invalidation must be performed on the entire cache. */
#if XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 0
  Xil_DCacheInvalidate ();
#endif

  Xil_DCacheDisable ();

  /* Clean up ICache */
  Xil_ICacheInvalidate ();
  Xil_ICacheDisable ();

  return 0;
}
Пример #2
0
int main(void)
{
  XPeriph *PeriphPtr;
  XVprocSs *VpssPtr;

  vpssVidio *thisCase;
  int status, cnt;
  u32 Timeout;
  static int Lock = FALSE;

  /* Bind instance pointer with definition */
  PeriphPtr = &PeriphInst;
  VpssPtr   = &VprocInst;

  /* Initialize ICache */
  Xil_ICacheInvalidate();
  Xil_ICacheEnable();

  /* Initialize DCache */
  Xil_DCacheInvalidate();
  Xil_DCacheEnable();

  xil_printf("\r\n--------------------------------------------------------\r\n");
  xil_printf("  Video Processing Subsystem Example Design %s\r\n", XVPROCSS_SW_VER);
  xil_printf("  (c) 2015, 2016 by Xilinx Inc.\r\n");

  status = XSys_Init(PeriphPtr, VpssPtr);
  if(status != XST_SUCCESS)
  {
	 xil_printf("CRITICAL ERR:: System Init Failed. Cannot recover from this error. Check HW\n\r");
  }

  /* Based on the customized Video Processing Subsystem functionality
   * the video input and output formats are chosen.
   */
  cnt = 0;
  while (cnt < USECASE_COUNT) {
    xil_printf("--------------------------------------------------------\r\n");
    printf("Topology is %s, case %d\r\n",topo_name[VpssPtr->Config.Topology],cnt+1);

	thisCase = &useCase[VpssPtr->Config.Topology][cnt];

    switch (VpssPtr->Config.Topology) {
      case XVPROCSS_TOPOLOGY_SCALER_ONLY:
        // In Scaler-only mode only the picture size may change
        // Choose video format based on the "422 Enabled" option
        // Video In: 720P Video Out: 1080P
        thisCase->Cformat_in = XV_HscalerIs422Enabled(VpssPtr->HscalerPtr)?
                     XVIDC_CSF_YCRCB_422:
                     XVIDC_CSF_YCRCB_444;
        thisCase->Cformat_out = thisCase->Cformat_in;
        break;

      case XVPROCSS_TOPOLOGY_FULL_FLEDGED:
        // Full Fledged mode may deinterlace, change picture size and/or color format.
        // In the Full Fledged configuration, the presence of a sub-core
        //   is indicated by a non-NULL pointer to the sub-core driver instance.
        // If there is no Deinterlacer AND 420 input is supported (Vcr present),
        //   choose progressive 420 input format
        if ((VpssPtr->DeintPtr      == NULL) &&
            (VpssPtr->VcrsmplrInPtr != NULL)) {
        // Video In: 720P 420  Video Out: 1080P RGB
          thisCase->width_in = 1280;
          thisCase->height_in = 720;
          thisCase->Cformat_in = XVIDC_CSF_YCRCB_420;
          thisCase->IsInterlaced = FALSE;

        // If the Deinterlacer is present,
        //   choose 480i interlaced input 422 (Hcr present) or 444 (Hcr absent)
        } else {
          if (VpssPtr->DeintPtr != NULL) {
          // Video In: 480i YUV  Video Out: 1080P RGB
            thisCase->width_in = 720;
            thisCase->height_in = 240;
            thisCase->Cformat_in = (VpssPtr->HcrsmplrPtr != NULL)?
			  XVIDC_CSF_YCRCB_422 : XVIDC_CSF_YCRCB_444;
            thisCase->IsInterlaced = TRUE;
          }
	    }

        break;

      default:
        break;
    }

    printf ("Set up Video Input and Output streams.\r\n");
    setup_video_io(PeriphPtr, VpssPtr, thisCase);

    printf ("Start VPSS.\r\n");
    status = start_system(PeriphPtr, VpssPtr);

    //Query video processing subsystem configuration
    XVprocSs_ReportSubsystemConfig(VpssPtr);

    if(status == XST_SUCCESS)
    {
      //Configure and start VTC with output timing
	  printf ("Start VTC.\r\n");
	  XPeriph_ConfigVtc(PeriphPtr,
			          &VpssPtr->VidOut,
			          VprocInst.Config.PixPerClock);

      //Configure and start the TPG
	  printf ("Start TPG.\r\n");
      XPeriph_ConfigTpg(PeriphPtr);

      /* check for output lock */
      xil_printf("Waiting for lock... ");
      Timeout = VIDEO_MONITOR_LOCK_TIMEOUT;
      while(!Lock && Timeout) {
        if(XPeriph_IsVideoLocked(PeriphPtr)) {
          xil_printf("Locked.\r\n");
          Lock = TRUE;
        }
        --Timeout;
      }
      if(!Timeout) {
        xil_printf("\r\nTEST FAILED\r\n");
      } else {
        xil_printf("\r\nTEST PASSED\r\n\r\n");
      }

      xil_printf("Stop... ");
      XVprocSs_Stop(VpssPtr);

      // In the Deint-only configuration, it is necessary to allow
      // some time for aximm traffic to stop, and the core to become idle
      if (XVprocSs_IsConfigModeDeinterlaceOnly(VpssPtr)) {
        if (XV_DeintWaitForIdle(VpssPtr->DeintPtr) == XST_SUCCESS)
          xil_printf ("Deint subcore IDLE.\r\n");
	  else
          xil_printf ("Error: Deint subcore NOT IDLE.\r\n");
      }

    } else {
      xil_printf("\r\nERR:: VProcss Configuration Failed. \r\n");
	  xil_printf("\r\nTEST FAILED\r\n");
    }

#if VERBOSE_MODE
  XVprocSs_LogDisplay(VpssPtr);
#endif

    xil_printf ("End testing this use case.\r\n");
    Lock = FALSE;
	cnt++;
  }

  while(1) {
    //NOP
  }

  return 0;
}