static void
awin_usb_phy_write(struct awinusb_softc *usbsc, u_int bit_addr, u_int bits,
u_int len)
{
bus_space_tag_t bst = usbsc->usbsc_bst;
bus_space_handle_t bsh = usbsc->usbsc_usb0_phy_csr_bsh;
uint32_t clk = AWIN_USB0_PHY_CTL_CLK0 << usbsc->usbsc_number;
uint32_t v = bus_space_read_4(bst, bsh, 0);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK0) == 0);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK1) == 0);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK2) == 0);
v &= ~AWIN_USB0_PHY_CTL_ADDR;
v &= ~AWIN_USB0_PHY_CTL_DAT;
v |= __SHIFTIN(bit_addr, AWIN_USB0_PHY_CTL_ADDR);
/*
* Bitbang the data to the phy, bit by bit, incrementing bit address
* as we go.
*/
for (; len > 0; bit_addr++, bits >>= 1, len--) {
v |= __SHIFTIN(bits & 1, AWIN_USB0_PHY_CTL_DAT);
bus_space_write_4(bst, bsh, 0, v);
delay(1);
bus_space_write_4(bst, bsh, 0, v | clk);
delay(1);
bus_space_write_4(bst, bsh, 0, v);
delay(1);
v += __LOWEST_SET_BIT(AWIN_USB0_PHY_CTL_ADDR);
v &= ~AWIN_USB0_PHY_CTL_DAT;
}
}
static void
awin_otg_phy_write(struct awin_otg_softc *sc, u_int bit_addr, u_int bits,
u_int len)
{
bus_space_tag_t bst = sc->sc_motg.sc_iot;
bus_space_handle_t bsh = sc->sc_motg.sc_ioh;
uint32_t clk = AWIN_USB0_PHY_CTL_CLK0;
bus_size_t reg = AWIN_USB0_PHY_CTL_REG;
uint32_t v = bus_space_read_4(bst, bsh, reg);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK0) == 0);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK1) == 0);
KASSERT((v & AWIN_USB0_PHY_CTL_CLK2) == 0);
v &= ~AWIN_USB0_PHY_CTL_ADDR;
v &= ~AWIN_USB0_PHY_CTL_DAT;
v |= __SHIFTIN(bit_addr, AWIN_USB0_PHY_CTL_ADDR);
/*
* Bitbang the data to the phy, bit by bit, incrementing bit address
* as we go.
*/
for (; len > 0; bit_addr++, bits >>= 1, len--) {
v |= __SHIFTIN(bits & 1, AWIN_USB0_PHY_CTL_DAT);
bus_space_write_4(bst, bsh, reg, v);
delay(1);
bus_space_write_4(bst, bsh, reg, v | clk);
delay(1);
bus_space_write_4(bst, bsh, reg, v);
delay(1);
v += __LOWEST_SET_BIT(AWIN_USB0_PHY_CTL_ADDR);
v &= ~AWIN_USB0_PHY_CTL_DAT;
}
}