uint_32 _mcf54xx_uart_serial_int_init
(
/* [IN] the interrupt I/O initialization information */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
MCF54XX_UART_SERIAL_INFO_STRUCT_PTR uart_info_ptr;
MCF54XX_UART_SERIAL_INIT_STRUCT_PTR uart_init_ptr;
uint_32 result;
uart_init_ptr = int_io_dev_ptr->DEV_INIT_DATA_PTR;
result = _mcf54xx_uart_serial_polled_init((pointer)uart_init_ptr,
&int_io_dev_ptr->DEV_INFO_PTR, open_name_ptr);
if (result != MQX_OK) {
return(result);
}/* Endif */
uart_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
uart_info_ptr->OLD_ISR_DATA = _int_get_isr_data(uart_init_ptr->VECTOR);
uart_info_ptr->OLD_ISR_EXCEPTION_HANDLER =
_int_get_exception_handler(uart_init_ptr->VECTOR);
uart_info_ptr->OLD_ISR =
_int_install_isr(uart_init_ptr->VECTOR, _mcf54xx_uart_serial_int_isr,
int_io_dev_ptr);
return(MQX_OK);
} /* Endbody */
void _klog_isr_start_internal
(
_mqx_uint vector_number
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
_GET_KERNEL_DATA(kernel_data);
if (kernel_data->KERNEL_COMPONENTS[KERNEL_LWLOG]) {
if (kernel_data->LOG_CONTROL & KLOG_INTERRUPTS_ENABLED) {
if (!(kernel_data->LOG_CONTROL & KLOG_SYSTEM_CLOCK_INT_ENABLED)) {
/* Check to see if the vector number is to be ignored */
if (vector_number == kernel_data->SYSTEM_CLOCK_INT_NUMBER) {
return;
} /* Endif */
} /* Endif */
_lwlog_write_internal(LOG_KERNEL_LOG_NUMBER,
(_mqx_max_type)KLOG_INTERRUPT, (_mqx_max_type)vector_number,
(_mqx_max_type)_int_get_isr(vector_number),
(_mqx_max_type)_int_get_isr_data(vector_number), (_mqx_max_type)0,
(_mqx_max_type)0, (_mqx_max_type)0);
} /* Endif */
} /* Endif */
} /* Endbody */
/* ===================================================================*/
LDD_TDeviceData* FTM_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
FTM_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_LPTimer);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_LPTimer, FTM_Interrupt, DeviceDataPrv);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00)); /* Clear control register */
/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0x1387 */
LPTMR0_CMR = LPTMR_CMR_COMPARE(0x1387); /* Set up compare register */
/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=1,PBYP=0,PCS=0 */
LPTMR0_PSR = (LPTMR_PSR_PRESCALE(0x01) | LPTMR_PSR_PCS(0x00)); /* Set up prescaler register */
/* NVICIP58: PRI58=0x70 */
NVICIP58 = NVIC_IP_PRI58(0x70);
/* NVICISER1: SETENA|=0x04000000 */
NVICISER1 |= NVIC_ISER_SETENA(0x04000000);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=1 */
LPTMR0_CSR = (LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_FTM_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
static boolean MCF5XXX_FEC_install_isr(
ENET_CONTEXT_STRUCT_PTR enet_ptr,
uint_32 int_num,
uint_32 int_index,
void _CODE_PTR_ isr,
uint_32 level,
uint_32 sublevel )
{
uint_32 vector = MCF5XXX_FEC_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
typedef void(*ISR_PTR)(pointer);
#if BSPCFG_ENET_RESTORE
MCF5XXX_FEC_CONTEXT_STRUCT_PTR fec_context_ptr = (MCF5XXX_FEC_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
// Save old ISR and data
fec_context_ptr->OLDISR_PTR[int_num] = (void *)_int_get_isr(vector);
fec_context_ptr->OLDISR_DATA[int_num] = _int_get_isr_data(vector);
#endif
if (_int_install_isr(vector, (ISR_PTR)isr, (pointer)enet_ptr)==NULL) {
return FALSE;
}
// Initialize interrupt priority and level
_psp_set_int_prio_and_level((PSP_INTERRUPT_TABLE_INDEX)vector, level, sublevel, TRUE);
return TRUE;
}
/* ===================================================================*/
LDD_TDeviceData* SystemTimer1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
SystemTimer1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_SysTick);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_SysTick, SystemTimer1_Interrupt, DeviceDataPrv);
/* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=0,TICKINT=0,ENABLE=0 */
SYST_CSR = 0x00U; /* Clear control register */
/* SYST_RVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,RELOAD=0x0003A97F */
SYST_RVR = SysTick_RVR_RELOAD(0x0003A97F); /* Setup reload value */
/* SYST_CVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CURRENT=0 */
SYST_CVR = SysTick_CVR_CURRENT(0x00); /* Clear current value */
/* SCB_SHPR3: PRI_15=0x80 */
SCB_SHPR3 = (uint32_t)((SCB_SHPR3 & (uint32_t)~(uint32_t)(
SCB_SHPR3_PRI_15(0x7F)
)) | (uint32_t)(
SCB_SHPR3_PRI_15(0x80)
));
/* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=1,TICKINT=1,ENABLE=0 */
SYST_CSR = (SysTick_CSR_CLKSOURCE_MASK | SysTick_CSR_TICKINT_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_SystemTimer1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
boolean MACNET_install_isr(
ENET_CONTEXT_STRUCT_PTR enet_ptr,
uint_32 int_num,
uint_32 int_index,
INT_ISR_FPTR isr,
uint_32 level,
uint_32 sublevel )
{
uint_32 vector = MACNET_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
#if BSPCFG_ENET_RESTORE
MACNET_CONTEXT_STRUCT_PTR macnet_context_ptr = (MACNET_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
/* Save old ISR and data */
macnet_context_ptr->OLDISR_PTR[int_num] = _int_get_isr(vector);
macnet_context_ptr->OLDISR_DATA[int_num] = _int_get_isr_data(vector);
#endif
if (_int_install_isr(vector, isr, (pointer)enet_ptr)==NULL) {
return FALSE;
}
/* Initialize interrupt priority and level */
_bsp_int_init((PSP_INTERRUPT_TABLE_INDEX)vector, level, sublevel, TRUE);
return TRUE;
}
/* ===================================================================*/
LDD_TDeviceData* CI2C1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate HAL device structure */
CI2C1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vector */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_I2C0);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_I2C0, CI2C1_Interrupt, DeviceDataPrv);
DeviceDataPrv->SerFlag = 0x00U; /* Reset all flags */
DeviceDataPrv->SendStop = LDD_I2C_SEND_STOP; /* Set variable for sending stop condition (for master mode) */
DeviceDataPrv->InpLenM = 0x00U; /* Set zero counter of data of reception */
DeviceDataPrv->OutLenM = 0x00U; /* Set zero counter of data of transmission */
/* SIM_SCGC4: I2C0=1 */
SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK;
/* I2C0_C1: IICEN=0,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0,WUEN=0,DMAEN=0 */
I2C0_C1 = 0x00U; /* Clear control register */
/* I2C0_S: TCF=0,IAAS=0,BUSY=0,ARBL=0,RAM=0,SRW=0,IICIF=1,RXAK=0 */
I2C0_S = I2C_S_IICIF_MASK; /* Clear interrupt flag */
/* PORTB_PCR1: ISF=0,MUX=2 */
PORTB_PCR1 = (uint32_t)((PORTB_PCR1 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x05)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
PORT_PDD_SetPinOpenDrain(PORTB_BASE_PTR, 0x01u, PORT_PDD_OPEN_DRAIN_ENABLE); /* Set SDA pin as open drain */
/* PORTB_PCR0: ISF=0,MUX=2 */
PORTB_PCR0 = (uint32_t)((PORTB_PCR0 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x05)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
PORT_PDD_SetPinOpenDrain(PORTB_BASE_PTR, 0x00u, PORT_PDD_OPEN_DRAIN_ENABLE); /* Set SCL pin as open drain */
/* NVICIP24: PRI24=0x80 */
NVICIP24 = NVIC_IP_PRI24(0x80);
/* NVICISER0: SETENA|=0x01000000 */
NVICISER0 |= NVIC_ISER_SETENA(0x01000000);
/* I2C0_C2: GCAEN=0,ADEXT=0,HDRS=0,SBRC=0,RMEN=0,AD=0 */
I2C0_C2 = I2C_C2_AD(0x00);
/* I2C0_FLT: ??=0,??=0,??=0,FLT=0 */
I2C0_FLT = I2C_FLT_FLT(0x00); /* Set glitch filter register */
/* I2C0_SMB: FACK=0,ALERTEN=0,SIICAEN=0,TCKSEL=0,SLTF=1,SHTF1=0,SHTF2=0,SHTF2IE=0 */
I2C0_SMB = I2C_SMB_SLTF_MASK;
/* I2C0_F: MULT=1,ICR=0x17 */
I2C0_F = (I2C_F_MULT(0x01) | I2C_F_ICR(0x17)); /* Set prescaler bits */
I2C_PDD_EnableDevice(I2C0_BASE_PTR, PDD_ENABLE); /* Enable device */
I2C_PDD_EnableInterrupt(I2C0_BASE_PTR); /* Enable interrupt */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_CI2C1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the data data structure */
}
uint_32 _kuart_int_init
(
/* [IN] the interrupt I/O initialization information */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
KUART_INFO_STRUCT_PTR sci_info_ptr;
KUART_INIT_STRUCT_PTR sci_init_ptr;
uint_32 result;
sci_init_ptr = int_io_dev_ptr->DEV_INIT_DATA_PTR;
result = _kuart_polled_init((pointer)sci_init_ptr, &int_io_dev_ptr->DEV_INFO_PTR, open_name_ptr);
if (result != MQX_OK) {
return(result);
}/* Endif */
sci_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
/* wk */
UART_MemMapPtr sci_ptr = sci_info_ptr->SCI_PTR;
sci_ptr->C2 &= 0x77;
/* end */
sci_info_ptr->OLD_ISR_DATA = _int_get_isr_data(sci_init_ptr->RX_TX_VECTOR);
sci_info_ptr->OLD_ISR_EXCEPTION_HANDLER = _int_get_exception_handler(sci_init_ptr->RX_TX_VECTOR);
/* wk */
sci_ptr->C2 &= 0x77;
/* end */
/* Init RX/TX interrupt vector */
sci_info_ptr->OLD_ISR =
// _int_install_isr(sci_init_ptr->RX_TX_VECTOR, _kuart_int_rx_tx_isr, int_io_dev_ptr);
_int_install_isr(sci_init_ptr->RX_TX_VECTOR, uart_isr, int_io_dev_ptr); // wk
/* wk */
sci_ptr->C2 &= 0x77;
/* end */
#if defined (BSP_TWRMCF51FD) || defined (BSP_TWRMCF51JF) || defined (BSP_TWRMCF51QM)
#else
/* Init RX interrupt vector */
sci_info_ptr->OLD_ISR =
_int_install_isr(sci_init_ptr->ERR_VECTOR, _kuart_int_err_isr, int_io_dev_ptr);
_cortex_int_init(sci_init_ptr->RX_TX_VECTOR, sci_init_ptr->RX_TX_PRIORITY, TRUE);
_cortex_int_init(sci_init_ptr->ERR_VECTOR, sci_init_ptr->ERR_PRIORITY, TRUE);
#endif
return(MQX_OK);
} /* Endbody */
/* ===================================================================*/
LDD_TDeviceData* MB_UART_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
MB_UART_TDeviceDataPtr DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Clear the receive counters and pointer */
DeviceDataPrv->InpRecvDataNum = 0x00U; /* Clear the counter of received characters */
DeviceDataPrv->InpDataNumReq = 0x00U; /* Clear the counter of characters to receive by ReceiveBlock() */
DeviceDataPrv->InpDataPtr = NULL; /* Clear the buffer pointer for received characters */
/* Clear the transmit counters and pointer */
DeviceDataPrv->OutSentDataNum = 0x00U; /* Clear the counter of sent characters */
DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */
DeviceDataPrv->OutDataPtr = NULL; /* Clear the buffer pointer for data to be transmitted */
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vectors */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART2);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART2, MB_UART_Interrupt, DeviceDataPrv);
/* SIM_SCGC: UART2=1 */
SIM_SCGC |= SIM_SCGC_UART2_MASK;
/* SIM_PINSEL1: UART2PS=0 */
SIM_PINSEL1 &= (uint32_t)~(uint32_t)(SIM_PINSEL1_UART2PS_MASK);
/* NVIC_IPR3: PRI_14=1 */
NVIC_IPR3 = (uint32_t)((NVIC_IPR3 & (uint32_t)~(uint32_t)(
NVIC_IP_PRI_14(0x02)
)) | (uint32_t)(
NVIC_IP_PRI_14(0x01)
));
/* NVIC_ISER: SETENA31=0,SETENA30=0,SETENA29=0,SETENA28=0,SETENA27=0,SETENA26=0,SETENA25=0,SETENA24=0,SETENA23=0,SETENA22=0,SETENA21=0,SETENA20=0,SETENA19=0,SETENA18=0,SETENA17=0,SETENA16=0,SETENA15=0,SETENA14=1,SETENA13=0,SETENA12=0,SETENA11=0,SETENA10=0,SETENA9=0,SETENA8=0,SETENA7=0,SETENA6=0,SETENA5=0,SETENA4=0,SETENA3=0,SETENA2=0,SETENA1=0,SETENA0=0 */
NVIC_ISER = NVIC_ISER_SETENA14_MASK;
/* NVIC_ICER: CLRENA31=0,CLRENA30=0,CLRENA29=0,CLRENA28=0,CLRENA27=0,CLRENA26=0,CLRENA25=0,CLRENA24=0,CLRENA23=0,CLRENA22=0,CLRENA21=0,CLRENA20=0,CLRENA19=0,CLRENA18=0,CLRENA17=0,CLRENA16=0,CLRENA15=0,CLRENA14=0,CLRENA13=0,CLRENA12=0,CLRENA11=0,CLRENA10=0,CLRENA9=0,CLRENA8=0,CLRENA7=0,CLRENA6=0,CLRENA5=0,CLRENA4=0,CLRENA3=0,CLRENA2=0,CLRENA1=0,CLRENA0=0 */
NVIC_ICER = 0x00U;
UART_PDD_EnableTransmitter(UART2_BASE_PTR, PDD_DISABLE); /* Disable transmitter. */
UART_PDD_EnableReceiver(UART2_BASE_PTR, PDD_DISABLE); /* Disable receiver. */
DeviceDataPrv->SerFlag = 0x00U; /* Reset flags */
/* UART2_C1: LOOPS=0,UARTSWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */
UART2_C1 = 0x00U; /* Set the C1 register */
/* UART2_C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */
UART2_C3 = 0x00U; /* Set the C3 register */
/* UART2_S2: LBKDIF=0,RXEDGIF=0,??=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */
UART2_S2 = 0x00U; /* Set the S2 register */
UART_PDD_SetBaudRate(UART2_BASE_PTR, 52U); /* Set the baud rate register. */
UART_PDD_EnableTransmitter(UART2_BASE_PTR, PDD_ENABLE); /* Enable transmitter */
UART_PDD_EnableReceiver(UART2_BASE_PTR, PDD_ENABLE); /* Enable receiver */
UART_PDD_EnableInterrupt(UART2_BASE_PTR, ( UART_PDD_INTERRUPT_RECEIVER )); /* Enable interrupts */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_MB_UART_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
uint_32 _vf_rtc_init
(
/* [IN] the initialization information for the device being opened */
IO_RTC_IF_DEVICE_STRUCT_PTR io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char_ptr open_name_ptr
)
{ /* Body */
VF_RTC_IF_INFO_STRUCT _PTR_ io_info_ptr;
VF_RTC_IF_INIT_STRUCT _PTR_ io_init_ptr;
VF_RTC_REGS_T _PTR_ regs_ptr;
uint_32 result;
io_init_ptr = io_dev_ptr->DEV_INIT_DATA_PTR;
io_info_ptr = (VF_RTC_IF_INFO_STRUCT _PTR_)(_mem_alloc_system_zero((uint_32)sizeof(VF_RTC_IF_INFO_STRUCT)));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (io_info_ptr == NULL) {
return(MQX_OUT_OF_MEMORY);
} /* Endif */
#endif
io_dev_ptr->DEV_INFO_PTR = io_info_ptr;
//get init value
io_info_ptr->INIT = *io_init_ptr;
/* reg_ptr will point to the rtc Registers */
regs_ptr = (VF_RTC_REGS_T _PTR_)io_info_ptr->INIT.BASE_ADDRESS;
io_info_ptr->RTC_REGS_PTR = regs_ptr;
//set up rtc interrupt
io_info_ptr->RTC_VECTOR = BSP_RTC_INTERRUPT_VECTOR;
io_info_ptr->OLD_ISR_DATA = _int_get_isr_data(io_info_ptr->RTC_VECTOR);
io_info_ptr->OLD_ISR_EXCEPTION_HANDLER =
_int_get_exception_handler(io_info_ptr->RTC_VECTOR);
io_info_ptr->OLD_ISR =
_int_install_isr(io_info_ptr->RTC_VECTOR,_vf_rtc_int_isr,io_info_ptr);
//now init ssp regs with defult values
// APB_RTC->rtcicr = 0x1;
// APB_RTC->rtcimsc = 0x1;
// APB_RTC->rtclr = 0x2;
// APB_RTC->rtccr = 0x1;
// APB_RTC->rtcmr = 0x50;
SysCtl_EnableRtc();
_vf_enable_int(BSP_RTC_INTERRUPT_VECTOR);
//======================
return (MQX_OK);
} /* Endbody */
unsigned long __prof_user_init
(
int start_timer
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
uint_32 timer_vector;
if (start_timer == 1) {
/* Need to see if we should start/restart the timer */
if (RTA_ptr == NULL) {
/* First time here, we need to do some initialization */
/* Get a state structure */
RTA_ptr = _mem_alloc_system_zero(sizeof(RTA_PROFILE_INFO_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (RTA_ptr == NULL) {
return(0xFFFFFFFF);
} /* Endif */
#endif
RTA_ptr->PROFILING_ACTIVE = TRUE;
_GET_KERNEL_DATA(kernel_data);
timer_vector = kernel_data->SYSTEM_CLOCK_INT_NUMBER;
/* Chain the new isr to the MQX timer interrupt */
RTA_ptr->OLD_ISR_DATA = _int_get_isr_data(timer_vector);
RTA_ptr->OLD_ISR = _int_install_isr(timer_vector, __prof_timer_isr, RTA_ptr);
} else {
/* Just need to reactivate profiling -- this will also execute if already enabled */
RTA_ptr->PROFILING_ACTIVE = TRUE;
} /* Endif */
/* Remember how many times the timer has been started */
RTA_ptr->NUM_STARTS++;
/* Return the period in ns */
return (_time_get_resolution() * 1000000);
} /* Endif */
/* No timer started */
return 0;
} /* Endbody */
void main_task
(
uint32_t initial_data
)
{
MY_ISR_STRUCT_PTR isr_ptr;
uint32_t result;
/* Create the lightweight semaphore */
result = _lwsem_create(&lwsem, 0);
if (result != MQX_OK) {
printf("\nCreating sem failed: 0x%X", result);
_task_block();
}
isr_ptr = _mem_alloc_zero((_mem_size)sizeof(MY_ISR_STRUCT));
isr_ptr->TICK_COUNT = 0;
isr_ptr->OLD_ISR_DATA = _int_get_isr_data(BSP_TIMER_INTERRUPT_VECTOR);
isr_ptr->OLD_ISR = _int_get_isr(BSP_TIMER_INTERRUPT_VECTOR);
/* Native MQX interrupt handling method, ISR is installed into the interrupt vector table in kernel */
if(! _int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, new_tick_isr, isr_ptr))
{
printf("Install interrupt handler to interrupt vector table of MQX kernel failed.\n");
_task_block();
}
#ifndef DEMO_ENABLE_KERNEL_ISR
_time_delay_ticks(200);
printf("\nTick count = %d\n", isr_ptr->TICK_COUNT);
_task_block();
#else
printf("\n====================== ISR Example =======================\n");
printf("Press the SW1 to blink LED1, press it again to turn it off\n");
while(1)
{
_lwsem_wait(&lwsem);
num_tick = isr_ptr->TICK_COUNT;
}
#endif /* DEMO_ENABLE_KERNEL_ISR */
}
_mqx_int _io_pcb_shm_ioctl
(
/* [IN] the file handle for the device */
FILE_DEVICE_STRUCT_PTR fd_ptr,
/* [IN] the ioctl command */
_mqx_uint cmd,
/* [IN] the ioctl parameters */
pointer param_ptr
)
{
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
_mqx_uint result = MQX_OK;
_psp_code_addr old_value;
_psp_code_addr_ptr pc_ptr = (_psp_code_addr_ptr)param_ptr;
_psp_data_addr_ptr pd_ptr = (_psp_data_addr_ptr)param_ptr;
boolean _PTR_ bool_param_ptr;
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr;
info_ptr = (IO_PCB_SHM_INFO_STRUCT_PTR)fd_ptr->DEV_DATA_PTR;
init_ptr = &info_ptr->INIT;
switch (cmd) {
case IO_PCB_IOCTL_ENQUEUE_READQ:
pcb_ptr = (IO_PCB_STRUCT_PTR)*pd_ptr;
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
break;
case IO_PCB_IOCTL_READ_CALLBACK_SET:
old_value = (_psp_code_addr)info_ptr->READ_CALLBACK_FUNCTION;
info_ptr->READ_CALLBACK_FUNCTION = (void (_CODE_PTR_)(
FILE_DEVICE_STRUCT_PTR, IO_PCB_STRUCT_PTR))*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_SET_INPUT_POOL:
old_value = (_psp_code_addr)info_ptr->READ_PCB_POOL;
info_ptr->READ_PCB_POOL = (_io_pcb_pool_id)*pc_ptr;
*pc_ptr = old_value;
info_ptr->FD = fd_ptr;
break;
case IO_PCB_IOCTL_START:
info_ptr->RX_OLDISR_PTR = _int_get_isr( init_ptr->RX_VECTOR);
info_ptr->RX_OLDISR_DATA = _int_get_isr_data(init_ptr->RX_VECTOR);
info_ptr->TX_OLDISR_PTR = _int_get_isr( init_ptr->TX_VECTOR);
info_ptr->TX_OLDISR_DATA = _int_get_isr_data(init_ptr->TX_VECTOR);
#if BSPCFG_IO_PCB_SHM_SUPPORT
if (_bsp_io_pcb_shm_int_install(init_ptr,info_ptr)!=MQX_OK) {
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
#else
/* Install rx ISR */
if (!_int_install_isr(init_ptr->RX_VECTOR, _io_pcb_shm_rx_isr, info_ptr))
{
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
/* Install the tx finished ISR */
if (!_int_install_isr(init_ptr->TX_VECTOR, _io_pcb_shm_tx_isr, info_ptr))
{
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
#endif
break;
case IO_PCB_IOCTL_UNPACKED_ONLY:
bool_param_ptr = (boolean _PTR_)param_ptr;
*bool_param_ptr = TRUE;
break;
default:
/* result = _io_ioctl(info_ptr->FD, cmd, param_ptr); */
break;
}
return result;
}
/* ===================================================================*/
LDD_TDeviceData* UART_A_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
UART_A_TDeviceDataPtr DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Clear the receive counters and pointer */
DeviceDataPrv->InpRecvDataNum = 0x00U; /* Clear the counter of received characters */
DeviceDataPrv->InpDataNumReq = 0x00U; /* Clear the counter of characters to receive by ReceiveBlock() */
DeviceDataPrv->InpDataPtr = NULL; /* Clear the buffer pointer for received characters */
/* Clear the transmit counters and pointer */
DeviceDataPrv->OutSentDataNum = 0x00U; /* Clear the counter of sent characters */
DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */
DeviceDataPrv->OutDataPtr = NULL; /* Clear the buffer pointer for data to be transmitted */
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vectors */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART3_RX_TX);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART3_RX_TX, UART_A_Interrupt, DeviceDataPrv);
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART3_ERR);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART3_ERR, UART_A_Interrupt, DeviceDataPrv);
/* SIM_SCGC4: UART3=1 */
SIM_SCGC4 |= SIM_SCGC4_UART3_MASK;
/* SIM_SCGC5: PORTC=1 */
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK;
/* PORTC_PCR16: ISF=0,MUX=3 */
PORTC_PCR16 = (uint32_t)((PORTC_PCR16 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x04)
)) | (uint32_t)(
PORT_PCR_MUX(0x03)
));
/* PORTC_PCR17: ISF=0,MUX=3 */
PORTC_PCR17 = (uint32_t)((PORTC_PCR17 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x04)
)) | (uint32_t)(
PORT_PCR_MUX(0x03)
));
/* NVICIP37: PRI37=0x70 */
NVICIP37 = NVIC_IP_PRI37(0x70);
/* NVICISER1: SETENA|=0x20 */
NVICISER1 |= NVIC_ISER_SETENA(0x20);
/* NVICIP38: PRI38=0x70 */
NVICIP38 = NVIC_IP_PRI38(0x70);
/* NVICISER1: SETENA|=0x40 */
NVICISER1 |= NVIC_ISER_SETENA(0x40);
UART_PDD_EnableTransmitter(UART3_BASE_PTR, PDD_DISABLE); /* Disable transmitter. */
UART_PDD_EnableReceiver(UART3_BASE_PTR, PDD_DISABLE); /* Disable receiver. */
DeviceDataPrv->SerFlag = 0x00U; /* Reset flags */
/* UART3_C1: LOOPS=0,UARTSWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */
UART3_C1 = 0x00U; /* Set the C1 register */
/* UART3_C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */
UART3_C3 = 0x00U; /* Set the C3 register */
/* UART3_C4: MAEN1=0,MAEN2=0,M10=0,BRFA=0 */
UART3_C4 = UART_C4_BRFA(0x00); /* Set the C4 register */
/* UART3_S2: LBKDIF=0,RXEDGIF=0,MSBF=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */
UART3_S2 = 0x00U; /* Set the S2 register */
/* UART3_MODEM: ??=0,??=0,??=0,??=0,RXRTSE=0,TXRTSPOL=0,TXRTSE=0,TXCTSE=0 */
UART3_MODEM = 0x00U; /* Set the MODEM register */
UART_PDD_SetBaudRateFineAdjust(UART3_BASE_PTR, 18u); /* Set baud rate fine adjust */
UART_PDD_SetBaudRate(UART3_BASE_PTR, 32U); /* Set the baud rate register. */
UART_PDD_EnableFifo(UART3_BASE_PTR, (UART_PDD_TX_FIFO_ENABLE | UART_PDD_RX_FIFO_ENABLE)); /* Enable RX and TX FIFO */
UART_PDD_FlushFifo(UART3_BASE_PTR, (UART_PDD_TX_FIFO_FLUSH | UART_PDD_RX_FIFO_FLUSH)); /* Flush RX and TX FIFO */
UART_PDD_EnableTransmitter(UART3_BASE_PTR, PDD_ENABLE); /* Enable transmitter */
UART_PDD_EnableReceiver(UART3_BASE_PTR, PDD_ENABLE); /* Enable receiver */
UART_PDD_EnableInterrupt(UART3_BASE_PTR, ( UART_PDD_INTERRUPT_RECEIVER )); /* Enable interrupts */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_UART_A_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
uint32_t _ki2c_int_init
(
/* [IN] Initialization information for the device being opened */
IO_I2C_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] The rest of the name of the device opened */
char *open_name_ptr
)
{ /* Body */
I2C_MemMapPtr i2c_ptr;
VKI2C_INFO_STRUCT_PTR io_info_ptr;
KI2C_INIT_STRUCT_PTR i2c_init_ptr;
uint32_t vector, result;
i2c_init_ptr = (KI2C_INIT_STRUCT_PTR)(int_io_dev_ptr->DEV_INIT_DATA_PTR);
result = _ki2c_polled_init (i2c_init_ptr,
&(int_io_dev_ptr->DEV_INFO_PTR),
open_name_ptr);
if (result)
{
return result;
}
io_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
i2c_ptr = io_info_ptr->I2C_PTR;
vector = _bsp_get_i2c_vector (i2c_init_ptr->CHANNEL);
if (0 == vector)
{
return I2C_ERROR_CHANNEL_INVALID;
}
io_info_ptr->VECTOR = vector;
#if BSPCFG_ENABLE_LEGACY_II2C_SLAVE
io_info_ptr->PORT_VECTOR = i2c_init_ptr->PORT_VECTOR;
io_info_ptr->PORT_BASE = i2c_init_ptr->PORT_BASE;
io_info_ptr->SDA_PIN_NUM = i2c_init_ptr->SDA_PIN_NUM;
#endif
_lwsem_create((LWSEM_STRUCT_PTR)(&(io_info_ptr->LWSEM)), 0);
/* Install new vectors and backup the old ones */
io_info_ptr->OLD_ISR_DATA = _int_get_isr_data (vector);
io_info_ptr->OLD_ISR = _int_install_isr (vector, _ki2c_isr, (void *)io_info_ptr);
#if BSPCFG_ENABLE_LEGACY_II2C_SLAVE
io_info_ptr->OLD_PORT_ISR_DATA = _int_get_isr_data (i2c_init_ptr->PORT_VECTOR);
io_info_ptr->OLD_PORT_ISR = _int_install_isr (i2c_init_ptr->PORT_VECTOR, _ki2c_stop_detect_isr, (void *)io_info_ptr);
#endif
/* Enable I2C interrupts */
_bsp_int_init((IRQInterruptIndex)vector, i2c_init_ptr->LEVEL, i2c_init_ptr->SUBLEVEL, TRUE);
#if BSPCFG_ENABLE_LEGACY_II2C_SLAVE
/* Enable Stop detection */
_bsp_int_init((IRQInterruptIndex)i2c_init_ptr->PORT_VECTOR, i2c_init_ptr->LEVEL, i2c_init_ptr->SUBLEVEL, TRUE);
#endif
i2c_ptr->C1 |= I2C_C1_IICIE_MASK;
return result;
} /* Endbody */
uint32_t _kuart_mix_init
(
/* [IN] the interrupt I/O initialization information */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char * open_name_ptr
)
{ /* Body */
KUART_INFO_STRUCT_PTR sci_info_ptr;
KUART_INIT_STRUCT_PTR sci_init_ptr;
uint32_t result = MQX_OK;
//Init basic uart setting
sci_init_ptr = int_io_dev_ptr->DEV_INIT_DATA_PTR;
result = _kuart_polled_init((void *)sci_init_ptr, &int_io_dev_ptr->DEV_INFO_PTR, open_name_ptr);
if (result != MQX_OK) {
return(result);
}/* Endif */
sci_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
sci_info_ptr->RX_KEEP = 1;
/* Add a timer config to check the UART RX state */
sci_info_ptr->LW_TIMER_PTR = (LWTIMER_PERIOD_STRUCT_PTR)_mem_alloc_system_zero(sizeof(LWTIMER_PERIOD_STRUCT) + sizeof(LWTIMER_STRUCT));
if (!sci_info_ptr->LW_TIMER_PTR)
{
result = MQX_OUT_OF_MEMORY;
goto error_free_timer;
}
sci_info_ptr->LW_TIMER = (LWTIMER_STRUCT_PTR)((uint8_t *)sci_info_ptr->LW_TIMER_PTR + sizeof(LWTIMER_PERIOD_STRUCT));
_time_init_ticks(&sci_info_ptr->ticks, 1);
_lwtimer_create_periodic_queue(sci_info_ptr->LW_TIMER_PTR ,*(uint32_t *)(&sci_info_ptr->ticks), 0);
_lwtimer_add_timer_to_queue(
sci_info_ptr->LW_TIMER_PTR,
sci_info_ptr->LW_TIMER,
0,
_kuart_period_isr,
(void *)int_io_dev_ptr);
/* RX DMA setting */
sci_info_ptr->RX_BUF = _mem_alloc_system_zero_uncached(sci_init_ptr->IQUEUE_SIZE);
sci_info_ptr->RX_ACTIVE = sci_info_ptr->RX_BUF;
if (!sci_info_ptr->RX_BUF)
{
result = MQX_OUT_OF_MEMORY;
goto error_free_buf;
}
sci_info_ptr->RX_DMA_CHAN = sci_init_ptr->RX_DMA_CHANNEL;
sci_info_ptr->RX_DMA_HARDWARE_REQUEST = _bsp_get_serial_rx_dma_request(sci_init_ptr->DEVICE);
#if PSP_MQX_CPU_IS_KINETIS
sci_info_ptr->ERR_INT = _bsp_get_serial_error_int_num(sci_init_ptr->DEVICE);
#endif
sci_info_ptr->RX_DMA_SEQ = 0;
result = dma_channel_claim(&sci_info_ptr->RX_DCH, sci_info_ptr->RX_DMA_CHAN);
if (result != MQX_OK)
{
goto error_free_channel;
}
result = dma_callback_reg(sci_info_ptr->RX_DCH, _kuart_dma_rx_isr, int_io_dev_ptr);
dma_channel_setup(sci_info_ptr->RX_DCH, 1, DMA_CHANNEL_FLAG_LOOP_MODE);
dma_request_source(sci_info_ptr->RX_DCH, sci_info_ptr->RX_DMA_HARDWARE_REQUEST);
if (result != MQX_OK)
{
goto error_free_channel;
}
/* Init RX/TX interrupt vector */
sci_info_ptr->OLD_ISR_TXRX_DATA = _int_get_isr_data(sci_init_ptr->RX_TX_VECTOR);
sci_info_ptr->OLD_ISR_EXCEPTION_HANDLER = _int_get_exception_handler(sci_init_ptr->RX_TX_VECTOR);
sci_info_ptr->OLD_ISR_TXRX =
_int_install_isr(sci_init_ptr->RX_TX_VECTOR, _kuart_mix_int_tx_isr, int_io_dev_ptr);
_bsp_int_init(sci_init_ptr->RX_TX_VECTOR, sci_init_ptr->RX_TX_PRIORITY, 0, TRUE);
/* Init mix error vector */
sci_info_ptr->OLD_ISR_ERR =
_int_install_isr(sci_info_ptr->ERR_INT, _kuart_mix_err_isr, int_io_dev_ptr);
_bsp_int_init(sci_info_ptr->ERR_INT, sci_init_ptr->ERR_PRIORITY, 0, TRUE);
/* config the UART RX channel first */
_kuart_prepare_rx_dma(int_io_dev_ptr);
return(MQX_OK);
error_free_timer:
if (!sci_info_ptr->LW_TIMER_PTR)
_mem_free(sci_info_ptr->LW_TIMER_PTR);
error_free_channel:
dma_channel_release(sci_info_ptr->RX_DCH);
error_free_buf:
if (sci_info_ptr->RX_BUF)
_mem_free(sci_info_ptr->RX_BUF);
return result;
} /* Endbody */
_mqx_uint _watchdog_create_component
(
/* [IN] the vector upon which timer interrupts on */
_mqx_uint timer_interrupt_vector,
/* [IN] the function to call when a watchdog timer expires */
void (_CODE_PTR_ error_function)(pointer td_ptr)
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
WATCHDOG_COMPONENT_STRUCT_PTR watchdog_component_ptr;
pointer interrupt_data;
_GET_KERNEL_DATA(kernel_data);
_KLOGE3(KLOG_watchdog_create_component, timer_interrupt_vector, error_function);
#if MQX_CHECK_ERRORS
if (kernel_data->IN_ISR) {
_KLOGX2(KLOG_watchdog_create_component, MQX_CANNOT_CALL_FUNCTION_FROM_ISR);
return(MQX_CANNOT_CALL_FUNCTION_FROM_ISR);
} /* Endif */
#endif
_lwsem_wait((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
if (kernel_data->KERNEL_COMPONENTS[KERNEL_WATCHDOG] != NULL) {
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_KLOGX2(KLOG_watchdog_create_component, MQX_OK);
return(MQX_OK);
} /* Endif */
#if MQX_CHECK_ERRORS
if (!error_function) {
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_KLOGX2(KLOG_watchdog_create_component, WATCHDOG_INVALID_ERROR_FUNCTION);
return(WATCHDOG_INVALID_ERROR_FUNCTION);
} /* Endif */
if ((timer_interrupt_vector < kernel_data->FIRST_USER_ISR_VECTOR) ||
(timer_interrupt_vector > kernel_data->LAST_USER_ISR_VECTOR))
{
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_KLOGX2(KLOG_watchdog_create_component, WATCHDOG_INVALID_INTERRUPT_VECTOR);
return(WATCHDOG_INVALID_INTERRUPT_VECTOR);
} /* Endif */
#endif
/* Get the watchdog component data structure */
watchdog_component_ptr = (WATCHDOG_COMPONENT_STRUCT_PTR)
_mem_alloc_system_zero((_mem_size)sizeof(WATCHDOG_COMPONENT_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (watchdog_component_ptr == NULL){
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_KLOGX2(KLOG_watchdog_create_component, MQX_OUT_OF_MEMORY);
return(MQX_OUT_OF_MEMORY);
} /* Endif */
#endif
_mem_set_type(watchdog_component_ptr, MEM_TYPE_WATCHDOG_COMPONENT);
watchdog_component_ptr->ERROR_FUNCTION =
(void (_CODE_PTR_)(TD_STRUCT_PTR))error_function;
watchdog_component_ptr->VALID = WATCHDOG_VALID;
watchdog_component_ptr->INTERRUPT_VECTOR = timer_interrupt_vector;
interrupt_data = _int_get_isr_data(timer_interrupt_vector);
_INT_DISABLE();
watchdog_component_ptr->TIMER_INTERRUPT_HANDLER = _int_install_isr(
timer_interrupt_vector, _watchdog_isr, interrupt_data);
#if MQX_CHECK_ERRORS
if (!watchdog_component_ptr->TIMER_INTERRUPT_HANDLER) {
_int_enable();
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_mem_free(watchdog_component_ptr);
_KLOGX2(KLOG_watchdog_create_component, WATCHDOG_INVALID_INTERRUPT_VECTOR);
return(WATCHDOG_INVALID_INTERRUPT_VECTOR);
} /* Endif */
#endif
kernel_data->KERNEL_COMPONENTS[KERNEL_WATCHDOG] = watchdog_component_ptr;
#if MQX_TASK_DESTRUCTION
kernel_data->COMPONENT_CLEANUP[KERNEL_WATCHDOG] = _watchdog_cleanup;
#endif
_INT_ENABLE();
_lwsem_post((LWSEM_STRUCT_PTR)(&kernel_data->COMPONENT_CREATE_LWSEM));
_KLOGX2(KLOG_watchdog_create_component, MQX_OK);
return(MQX_OK);
} /* Endbody */
/* ===================================================================*/
LDD_TDeviceData* TU1_Init(LDD_TUserData *UserDataPtr)
{
TU1_TDeviceData *DeviceDataPrv;
if (PE_LDD_DeviceDataList[PE_LDD_COMPONENT_TU1_ID] == NULL) {
/* Allocate device structure */
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
DeviceDataPrv->InitCntr = 1U; /* First initialization */
}
else {
/* Memory is already allocated */
DeviceDataPrv = (TU1_TDeviceDataPtr) PE_LDD_DeviceDataList[PE_LDD_COMPONENT_TU1_ID];
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
DeviceDataPrv->InitCntr++; /* Increment counter of initialization */
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_FTM0);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_FTM0, TU1_Interrupt, DeviceDataPrv);
/* SIM_SCGC6: FTM0=1 */
SIM_SCGC6 |= SIM_SCGC6_FTM0_MASK;
/* FTM0_MODE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,FAULTIE=0,FAULTM=0,CAPTEST=0,PWMSYNC=0,WPDIS=1,INIT=0,FTMEN=0 */
FTM0_MODE = (FTM_MODE_FAULTM(0x00) | FTM_MODE_WPDIS_MASK); /* Set up mode register */
/* FTM0_SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TOF=0,TOIE=0,CPWMS=0,CLKS=0,PS=0 */
FTM0_SC = (FTM_SC_CLKS(0x00) | FTM_SC_PS(0x00)); /* Clear status and control register */
/* FTM0_CNTIN: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,INIT=0 */
FTM0_CNTIN = FTM_CNTIN_INIT(0x00); /* Clear counter initial register */
/* FTM0_CNT: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNT=0 */
FTM0_CNT = FTM_CNT_COUNT(0x00); /* Reset counter register */
/* FTM0_C0SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C0SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C1SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C1SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C2SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C2SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C3SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C3SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C4SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C4SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C5SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C5SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C6SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C6SC = 0x00U; /* Clear channel status and control register */
/* FTM0_C7SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CHF=0,CHIE=0,MSB=0,MSA=0,ELSB=0,ELSA=0,??=0,DMA=0 */
FTM0_C7SC = 0x00U; /* Clear channel status and control register */
/* FTM0_MOD: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,MOD=0x927B */
FTM0_MOD = FTM_MOD_MOD(0x927B); /* Set up modulo register */
DeviceDataPrv->EnEvents = 0x0100U; /* Enable selected events */
/* NVICIP42: PRI42=0x70 */
NVICIP42 = NVIC_IP_PRI42(0x70);
/* NVICISER1: SETENA|=0x0400 */
NVICISER1 |= NVIC_ISER_SETENA(0x0400);
/* FTM0_SC: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TOF=0,TOIE=1,CPWMS=0,CLKS=1,PS=4 */
FTM0_SC = (FTM_SC_TOIE_MASK | FTM_SC_CLKS(0x01) | FTM_SC_PS(0x04)); /* Set up status and control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_TU1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/*
** ===================================================================
** Method : DA1_Init (component DAC_LDD)
**
** Description :
** Initializes the device according to design-time
** configuration properties. Allocates memory for the device
** data structure.
** If the <Enable in init. code> is set to "yes" then the
** device is also enabled (see the description of the Enable
** method).
** This method can be called only once. Before the second call
** of Init the Deinit method must be called first. If DMA
** service is enabled this method also initializes inherited
** DMA Transfer component.
** Parameters :
** NAME - DESCRIPTION
** * UserDataPtr - Pointer to the user or
** RTOS specific data. This pointer will be
** passed as an events or callback parameter.
** Returns :
** --- - Device data structure pointer.
** ===================================================================
*/
LDD_TDeviceData* DA1_Init(LDD_TUserData *UserDataPtr)
{
DA1_TDeviceData *DeviceDataPtr;
/* Allocate HAL device structure */
/* {MQX RTOS Adapter} Driver memory allocation: RTOS function call is defined by MQX RTOS Adapter property */
DeviceDataPtr = (DA1_TDeviceData *)_mem_alloc_system((_mem_size)sizeof(DA1_TDeviceData));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (DeviceDataPtr == NULL) {
return (NULL);
}
#endif
DeviceDataPtr->DmaTransferDeviceDataPtr = NULL; /* DMA is not used */
DeviceDataPtr->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Enable device clock gate */
/* SIM_SCGC2: DAC0=1 */
SIM_SCGC2 |= (uint32_t)0x1000UL;
DAC_PDD_EnableDevice(DAC0_BASE_PTR,PDD_DISABLE); /* Disable device */
/* Interrupt vector(s) allocation */
/* {MQX RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPtr->SavedISRSettings_BufferInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_DAC0);
DeviceDataPtr->SavedISRSettings_BufferInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_DAC0, DA1_BufferInterrupt, DeviceDataPtr);
/* Interrupt vector(s) priority setting */
/* NVICIP81: PRI81=0x90 */
NVICIP81 = (uint8_t)0x90U;
/* NVICISER2: SETENA|=0x00020000 */
NVICISER2 |= (uint32_t)0x00020000UL;
/* DAC0_DAT0H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT0H = (uint8_t)0x00U;
/* DAC0_DAT0L: DATA=0 */
DAC0_DAT0L = (uint8_t)0x00U;
/* DAC0_DAT1H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT1H = (uint8_t)0x00U;
/* DAC0_DAT1L: DATA=0 */
DAC0_DAT1L = (uint8_t)0x00U;
/* DAC0_DAT2H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT2H = (uint8_t)0x00U;
/* DAC0_DAT2L: DATA=0 */
DAC0_DAT2L = (uint8_t)0x00U;
/* DAC0_DAT3H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT3H = (uint8_t)0x00U;
/* DAC0_DAT3L: DATA=0 */
DAC0_DAT3L = (uint8_t)0x00U;
/* DAC0_DAT4H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT4H = (uint8_t)0x00U;
/* DAC0_DAT4L: DATA=0 */
DAC0_DAT4L = (uint8_t)0x00U;
/* DAC0_DAT5H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT5H = (uint8_t)0x00U;
/* DAC0_DAT5L: DATA=0 */
DAC0_DAT5L = (uint8_t)0x00U;
/* DAC0_DAT6H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT6H = (uint8_t)0x00U;
/* DAC0_DAT6L: DATA=0 */
DAC0_DAT6L = (uint8_t)0x00U;
/* DAC0_DAT7H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT7H = (uint8_t)0x00U;
/* DAC0_DAT7L: DATA=0 */
DAC0_DAT7L = (uint8_t)0x00U;
/* DAC0_DAT8H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT8H = (uint8_t)0x00U;
/* DAC0_DAT8L: DATA=0 */
DAC0_DAT8L = (uint8_t)0x00U;
/* DAC0_DAT9H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT9H = (uint8_t)0x00U;
/* DAC0_DAT9L: DATA=0 */
DAC0_DAT9L = (uint8_t)0x00U;
/* DAC0_DAT10H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT10H = (uint8_t)0x00U;
/* DAC0_DAT10L: DATA=0 */
DAC0_DAT10L = (uint8_t)0x00U;
/* DAC0_DAT11H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT11H = (uint8_t)0x00U;
/* DAC0_DAT11L: DATA=0 */
DAC0_DAT11L = (uint8_t)0x00U;
/* DAC0_DAT12H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT12H = (uint8_t)0x00U;
/* DAC0_DAT12L: DATA=0 */
DAC0_DAT12L = (uint8_t)0x00U;
/* DAC0_DAT13H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT13H = (uint8_t)0x00U;
/* DAC0_DAT13L: DATA=0 */
DAC0_DAT13L = (uint8_t)0x00U;
/* DAC0_DAT14H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT14H = (uint8_t)0x00U;
/* DAC0_DAT14L: DATA=0 */
DAC0_DAT14L = (uint8_t)0x00U;
/* DAC0_DAT15H: ??=0,??=0,??=0,??=0,DATA=0 */
DAC0_DAT15H = (uint8_t)0x00U;
/* DAC0_DAT15L: DATA=0 */
DAC0_DAT15L = (uint8_t)0x00U;
/* DAC0_C2: DACBFRP=0,DACBFUP=0x0F */
DAC0_C2 = (uint8_t)0x0FU;
/* DAC0_C1: DMAEN=0,??=0,??=0,DACBFWM=3,DACBFMD=0,DACBFEN=1 */
DAC0_C1 = (uint8_t)0x19U;
/* DAC0_C0: DACEN=0,DACRFS=1,DACTRGSEL=1,DACSWTRG=0,LPEN=0,DACBWIEN=1,DACBTIEN=1,DACBBIEN=0 */
DAC0_C0 = (uint8_t)0x66U;
/* DAC0_SR: ??=0,??=0,??=0,??=0,??=0,DACBFWMF=0,DACBFRPTF=0,DACBFRPBF=0 */
DAC0_SR = (uint8_t)0x00U;
DeviceDataPtr->EnMode = TRUE; /* Set the flag "device enabled" in the actual speed CPU mode */
DeviceDataPtr->EnUser = FALSE; /* Set the flag "device disabled by user" */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_DA1_ID,DeviceDataPtr);
return ((LDD_TDeviceData*)DeviceDataPtr); /* Return pointer to the data data structure */
}
/*!
* \brief To provide support for exception handlers, applications can use this ISR
* to replace the default ISR. The ISR is specific to the PSP.
*
* An application calls _int_install_exception_isr() to install _int_exception_isr().
* \n The function _int_exception_isr() does the following:
* \n - If an exception occurs when a task is running and a task exception ISR
* exists, MQX runs the ISR; if a task exception ISR does not exist, MQX aborts
* the task by calling _task_abort().
* \n - If an exception occurs when an ISR is running and an ISR exception ISR
* exists, MQX aborts the running ISR and runs the ISR’s exception ISR.
* \n - The function walks the interrupt stack looking for information about the
* ISR or task that was running before the exception occurred. If the function
* determines that the interrupt stack contains incorrect information, it calls
* _mqx_fatal_error() with error code MQX_CORRUPT_INTERRUPT_STACK.
*
* \param[in] parameter Parameter passed to the default ISR (the vector number).
*
* \warning See description.
*
* \see _int_install_exception_isr
* \see _mqx_fatal_error
* \see _task_abort
*/
void _int_exception_isr
(
pointer parameter
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
TD_STRUCT_PTR td_ptr;
PSP_INT_CONTEXT_STRUCT_PTR exception_frame_ptr;
PSP_INT_CONTEXT_STRUCT_PTR isr_frame_ptr;
INTERRUPT_TABLE_STRUCT_PTR table_ptr;
INT_EXCEPTION_FPTR exception_handler;
uint_32 isr_vector;
/* uint_32 exception_vector; */
_GET_KERNEL_DATA(kernel_data);
td_ptr = kernel_data->ACTIVE_PTR;
/* Stop all interrupts */
_PSP_SET_DISABLE_SR(kernel_data->DISABLE_SR);
/*_int_disable(); */
if ( kernel_data->IN_ISR > 1 ) {
/* We have entered this function from an exception that happened
* while an isr was running.
*/
/* Get our current exception frame */
exception_frame_ptr = kernel_data->INTERRUPT_CONTEXT_PTR;
/* the current context contains a pointer to the next one */
isr_frame_ptr = (PSP_INT_CONTEXT_STRUCT_PTR)exception_frame_ptr->PREV_CONTEXT;
if (isr_frame_ptr == NULL) {
/* This is not allowable */
_mqx_fatal_error(MQX_CORRUPT_INTERRUPT_STACK);
}
isr_vector = isr_frame_ptr->EXCEPTION_NUMBER;
/* Call the isr exception handler for the ISR that WAS running */
table_ptr = kernel_data->INTERRUPT_TABLE_PTR;
#if MQX_CHECK_ERRORS
if ((table_ptr != NULL) &&
(isr_vector >= kernel_data->FIRST_USER_ISR_VECTOR) &&
(isr_vector <= kernel_data->LAST_USER_ISR_VECTOR))
{
#endif
/* Call the exception handler for the isr on isr_vector,
* passing the isr_vector, the exception_vector, the isr_data and
* the basic frame pointer for the exception
*/
exception_handler = _int_get_exception_handler(isr_vector);
if (exception_handler) {
(*exception_handler)(isr_vector, (_mqx_uint)parameter, _int_get_isr_data(isr_vector)/*table_ptr->APP_ISR_DATA*/, exception_frame_ptr);
}
#if MQX_CHECK_ERRORS
} else {
/* In this case, the exception occured in this handler */
_mqx_fatal_error(MQX_INVALID_VECTORED_INTERRUPT);
}
#endif
/* Indicate we have popped 1 interrupt stack frame (the exception frame) */
--kernel_data->IN_ISR;
/* Reset the stack to point to the interrupt frame */
/* And off we go. Will never return */
_psp_exception_return( (pointer)isr_frame_ptr );
} else {
/* We have entered this function from an exception that happened
* while a task was running.
*/
if (td_ptr->EXCEPTION_HANDLER_PTR != NULL ) {
(*td_ptr->EXCEPTION_HANDLER_PTR)((_mqx_uint)parameter,
td_ptr->STACK_PTR);
} else {
/* Abort the current task */
_task_abort(MQX_NULL_TASK_ID);
}
}
}
