/**
@brief ADC, connected to APB2 initialization
@param id ADC device identificator
*/
Analog::Analog(APB2 id):
Device{id},
_base{ adc_base(id,apb2_adcs) }
{
// ADCCLK should be less than 14MHz. Here ADCCLK = PCLK2/2 = 24/2 = 12MHz
// Divider options: RCC_PCLK2_Div2,RCC_PCLK2_Div4,RCC_PCLK2_Div6,RCC_PCLK2_Div8
// TODO: To be done once for all ADCs.
RCC_ADCCLKConfig(RCC_PCLK2_Div2);
// Register this for IRQ handling
adc[0] = this;
// ADC default configuration
//ADC_StructInit(&_init);
//load structure values to control and status registers
//ADC_Init(_base, &_init);
// configure NVIC: list all necessary interrupts here
_irq(ADC1_IRQn);
}
INTERFACE[16550]:
#include "types.h"
/**
* 16550 implementation of the UART interface.
*/
EXTENSION class Uart
{
public:
/**
* Start this serial port for I/O.
* @param port the I/O port base address.
* @param irq the IRQ assigned to this port, -1 if none.
*/
bool startup(Address port, int irq);
enum {
PAR_NONE = 0x00,
PAR_EVEN = 0x18,
PAR_ODD = 0x08,
DAT_5 = 0x00,
DAT_6 = 0x01,
DAT_7 = 0x02,
DAT_8 = 0x03,
STOP_1 = 0x00,
STOP_2 = 0x04,
MODE_8N1 = PAR_NONE | DAT_8 | STOP_1,
MODE_7E1 = PAR_EVEN | DAT_7 | STOP_1,
// these two values are to leave either mode
// or baud rate unchanged on a call to change_mode
MODE_NC = 0x1000000,
BAUD_NC = 0x1000000,
};
private:
enum Registers {
TRB = 0, // Transmit/Receive Buffer (read/write)
BRD_LOW = 0, // Baud Rate Divisor LSB if bit 7 of LCR is set (read/write)
IER = 1, // Interrupt Enable Register (read/write)
BRD_HIGH = 1, // Baud Rate Divisor MSB if bit 7 of LCR is set (read/write)
IIR = 2, // Interrupt Identification Register (read only)
FCR = 2, // 16550 FIFO Control Register (write only)
LCR = 3, // Line Control Register (read/write)
MCR = 4, // Modem Control Register (read/write)
LSR = 5, // Line Status Register (read only)
MSR = 6, // Modem Status Register (read only)
SPR = 7, // Scratch Pad Register (read/write)
};
Address port;
int _irq;
};
IMPLEMENTATION[16550]:
#include "io.h"
#include "processor.h"
IMPLEMENT
Uart::Uart() : port(~0U), _irq(-1)
{}
IMPLEMENT
Uart::~Uart()
{}
PRIVATE inline NEEDS["io.h"]
void Uart::outb( Unsigned8 b, Registers reg )
{
Io::out8(b, port + (reg << Access_shift));
}
