BOOL ResourceManager::getPCIConfiguration(ULONG pciId) { ULONG devNr, busNr, funcNr, temp, cfgaddrreg, detectedId; BOOL found = FALSE; cfgaddrreg = _inpd(PCI_CONFIG_ADDRESS); for(busNr=0;busNr<255;busNr++) //BusNumber<255 { for(devNr=0;devNr<32;devNr++) { for(funcNr=0;funcNr<8;funcNr++) { temp = ((ULONG)((ULONG)devNr<<11UL) + ((ULONG)busNr<<16UL) + ((ULONG)funcNr << 8UL)); _outpd(PCI_CONFIG_ADDRESS, PCI_CONFIG_ENABLE|temp); detectedId = _inpd(PCI_CONFIG_DATA); if(detectedId == pciId) { found = TRUE; break; } } if(found) break; } if(found) break; } if(!found) { _outpd(PCI_CONFIG_ADDRESS, cfgaddrreg); return FALSE; } for(int i=0;i<64;i++) { temp = ((ULONG)((ULONG)devNr<<11UL) + ((ULONG)busNr<<16UL) + ((ULONG)funcNr << 8UL) + (i << 2)); _outpd(PCI_CONFIG_ADDRESS, PCI_CONFIG_ENABLE|temp); PCIConfig[i] = _inpd(PCI_CONFIG_DATA); } _outpd(PCI_CONFIG_ADDRESS, cfgaddrreg); pciConfigData = (PCIConfigData *)&PCIConfig[0]; if(pciConfigData->Bar0 == 0 || pciConfigData->Bar0 == 0xFFFFFFFF) { DebugInt3(); return(FALSE); } return TRUE; }
int searchPCIDevice(unsigned int vendorID,unsigned int deviceID,PCIInfo *info) { int i,j; int bus,device; unsigned int id,ioa,iod; bus=0; device=0; id=vendorID|(deviceID<<16); for(i=0;i<5;i++) { for(j=0;j<32;j++) { bus=i; device=j; ioa=0x80000000+bus*0x10000+(device*8)*0x100; _outpd(0xcf8,ioa); iod=_inpd(0xcfc); if(iod==id) { info->bus=bus; info->device=device; return 1; } } } return 0; }
void PhsclBaseAddr(PCIInfo *info) { int bus,device; unsigned int iobase,ioa,temp; int i; bus=info->bus; device=info->device; iobase=0x80000000+bus*0x10000+(device*8)*0x100; ioa=iobase+0x10; for(i=0;i<=5;i++) { _outpd(0xcf8,ioa); temp=_inpd(0xcfc); if((temp&0x01)==0) { temp=temp&0xfffffff0; } else { temp=temp&0xfffc; } info->addr[i]=temp; ioa+=0x4; } }
static U32 ReadPCI( U32 uAddress ) { #ifdef _MSC_VER #if (_MSC_VER <= 800) // MS 16-bit compiler (i.e. 1.52c) out32( PCI_INDEX_REG, uAddress ); return( in32( PCI_DATA_REG ) ); #else // ME 32-bit compiler (i.e. MSVC 6.0+) _outpd( PCI_INDEX_REG, uAddress ); return( _inpd( PCI_DATA_REG ) ); #endif #else // Open Watcom 32-bit compiler outpd( PCI_INDEX_REG, uAddress ); return( inpd( PCI_DATA_REG ) ); #endif }
/** Performs a 32-bit write to the specified, possibly unaligned I/O-type address. Writes the 32-bit I/O port specified by Port with the value specified by Value and returns Value. This function must guarantee that all I/O read and write operations are serialized. If 32-bit unaligned I/O port operations are not supported, then ASSERT(). @param[in] Port I/O port address @param[in] Value 32-bit word to write @return The value written to the I/O port. **/ UINT32 UnalignedIoWrite32 ( IN UINTN Port, IN UINT32 Value ) { _ReadWriteBarrier (); _outpd ((UINT16)Port, Value); _ReadWriteBarrier (); return Value; }
/** Writes a 32-bit I/O port. Writes the 32-bit I/O port specified by Port with the value specified by Value and returns Value. This function must guarantee that all I/O read and write operations are serialized. If 32-bit I/O port operations are not supported, then ASSERT(). If Port is not aligned on a 32-bit boundary, then ASSERT(). @param Port The I/O port to write. @param Value The value to write to the I/O port. @return The value written to the I/O port. **/ UINT32 EFIAPI IoWrite32 ( IN UINTN Port, IN UINT32 Value ) { ASSERT ((Port & 3) == 0); _ReadWriteBarrier (); _outpd ((UINT16)Port, Value); _ReadWriteBarrier (); return Value; }
bool _stdcall SetPortVal(WORD wPortAddr, DWORD dwPortVal, BYTE bSize) { tagPort32Struct Port32Struct; DWORD dwBytesReturned; if (!IsWinIoInitialized) return false; if (IsNT) { switch (bSize) { case 1: _outp(wPortAddr, dwPortVal); break; case 2: _outpw(wPortAddr, (WORD)dwPortVal); break; case 4: _outpd(wPortAddr, dwPortVal); break; } } else { Port32Struct.bSize = bSize; Port32Struct.dwPortVal = dwPortVal; Port32Struct.wPortAddr = wPortAddr; return DeviceIoControl(hDriver, WINIO_WRITEPORT, &Port32Struct, sizeof(Port32Struct), NULL, 0, &dwBytesReturned, NULL); } return true; }
// pci_read_.. ARE NOT USED BYTE pci_read_byte(WORD bus, WORD dev, WORD func, BYTE offset ) { WORD target = func + ((dev & 0x1F) << 3) + ((bus & 0xFF) << 8) ; _outpd( 0xCF8, (DWORD)( target << 8 ) | 0x80000000UL | ((DWORD)offset & ~3 ) ); return (BYTE)_inp( 0xCFC + (offset & 0x3) ); }
DWORD pci_read_dword(WORD bus, WORD dev, WORD func, BYTE offset ) { WORD target = func + ((dev & 0x1F) << 3) + ((bus & 0xFF) << 8) ; _outpd( 0xCF8, (DWORD)( target << 8 ) | 0x80000000UL | ((DWORD)offset & ~3 ) ); return _inpd( 0xCFC ); }
int main(){ // variables PCI_CONFIG_ADDRESS cfg; USHORT bus = 0, dev = 0, func = 0; ULONG val = 0; ULONG devId, venId; ULONG class0, class1, class2, class3, revision; ULONG subId, subVenId; int count = 0; // init // load driver ALLOW_IO_OPERATIONS; // open output file FILE * f = fopen(FILE_OUTPUT, "w"); if (!f) { printf("Can't create output file. Abort"); return 1; } // printf output header fprintf(f, "<table><tr><th>Bus</th><th>Device</th><th>Function</th><th>DeviceId</th><th>VendorId</th><th>ClassName</th><th>VendorName</th><th>SubVenName</th><th>DeviceName</th><th>Class</th><th>Revision</th><th>SubId</th><th>SubVendorId</th></tr>\n"); printf("PCI look-up started...\n"); // loop through all bus-dev-func variations for(bus = 0; bus < PCI_MAX_BUSES; bus++){ for(dev = 0; dev < PCI_MAX_DEVICES; dev++){ for(func = 0; func < PCI_MAX_FUNCTIONS; func++){ // prepate bits cfg.u1.s1.Enable = 1; cfg.u1.s1.BusNumber = bus; cfg.u1.s1.DeviceNumber = dev; cfg.u1.s1.FunctionNumber = func; cfg.u1.s1.RegisterNumber = 0; // read general info _outpd(PCI_ADDRESS_PORT, cfg.u1.Value); val = _inpd(PCI_DATA_PORT); // if no device - continue if (val == 0 || val == -1) continue; count++; // get deviceId and vendorId devId = val >> 16; venId = val - (devId << 16); // read classId, revisionId cfg.u1.s1.RegisterNumber = 0x08 >> 2; _outpd(PCI_ADDRESS_PORT, cfg.u1.Value); val = _inpd(PCI_DATA_PORT); class0 = val >> 8; revision = val - (class0 << 8); class1 = class0 >> 16; class3 = class0 - (class1 << 16); class2 = class3 >> 8; class3 = class3 - (class2 << 8); // read subsystemId cfg.u1.s1.RegisterNumber = 0x2C >> 2; _outpd(PCI_ADDRESS_PORT, cfg.u1.Value); val = _inpd(PCI_DATA_PORT); subId = val >> 16; subVenId = val - (subId << 16); // all data collected // put data to file fprintf(f, "<tr><td>%02X</td><td>%02X</td><td>%02X</td><td>%02X</td><td>%02X</td><td>", bus, dev, func, devId, venId); putDeviceInfo(f, devId, venId, subVenId, class1, class2, class3); fprintf(f, "%02X-%02X-%02X</td><td>%02X</td><td>%02X</td><td>%02X</td></tr>\n", class1, class2, class3, revision, subId, subVenId); } } } // close table fprintf(f, "</table><p>Total PCI devices discovered: %d</p>", count); printf("\nPCI look-up done. Devices discovered: %d\nSee %s to details\n", count, FILE_OUTPUT); return 0; }
unsigned long MSVCRT__outpd( unsigned short port, unsigned long dataword) { return _outpd(port, dataword); }