/*
Caller:ISR handler...
This will be called when CPWM interrupt is up.
using to update cpwn of drv; and drv willl make a decision to up or down pwr level
*/
void cpwm_int_hdl(_adapter *padapter, struct reportpwrstate_parm *preportpwrstate)
{
struct pwrctrl_priv *pwrpriv = &(padapter->pwrctrlpriv);
struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
_func_enter_;
if(pwrpriv->cpwm_tog == ((preportpwrstate->state)&0x80)){
RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm_tog = %x this time cpwm=0x%x toggle bit didn't change !!!\n",pwrpriv->cpwm_tog ,preportpwrstate->state));
goto exit;
}
_enter_pwrlock(&pwrpriv->lock);
pwrpriv->cpwm = (preportpwrstate->state)&0xf;
if(pwrpriv->cpwm >= PS_STATE_S2){
if(pwrpriv->alives & CMD_ALIVE)
_rtw_up_sema(&(pcmdpriv->cmd_queue_sema));
if(pwrpriv->alives & XMIT_ALIVE)
_rtw_up_sema(&(pxmitpriv->xmit_sema));
}
pwrpriv->cpwm_tog= (preportpwrstate->state)&0x80;
_exit_pwrlock(&pwrpriv->lock);
exit:
RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm = %x !!!\n",pwrpriv->cpwm));
_func_exit_;
}
void rtw_stop_drv_threads (_adapter *padapter)
{
RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n"));
//Below is to termindate rtw_cmd_thread & event_thread...
_rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema);
//_rtw_up_sema(&padapter->cmdpriv.cmd_done_sema);
if(padapter->cmdThread){
_rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema);
}
#ifdef CONFIG_EVENT_THREAD_MODE
_rtw_up_sema(&padapter->evtpriv.evt_notify);
if(padapter->evtThread){
_rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema);
}
#endif
#ifdef CONFIG_XMIT_THREAD_MODE
// Below is to termindate tx_thread...
_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
_rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema);
RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n"));
#endif
#ifdef CONFIG_RECV_THREAD_MODE
// Below is to termindate rx_thread...
_rtw_up_sema(&padapter->recvpriv.recv_sema);
_rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema);
RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt:recv_thread can be terminated! \n"));
#endif
}
VOID
MPTBT_FwC2hBtMpCtrl(
PADAPTER Adapter,
pu1Byte tmpBuf,
u1Byte length
)
{
u32 i;
PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx);
PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf;
//cancel_timeout for h2c handle
_cancel_timer_ex( &pMptCtx->MPh2c_timeout_timer);
DBG_8192C("[MPT], MPTBT_FwC2hBtMpCtrl(), hex: \n");
for(i=0;i<=length;i++)
{
//DBG_8192C("[MPT], MPTBT_FwC2hBtMpCtrl(), hex: \n",tmpBuf[i], length);
DBG_8192C(" 0x%x ",tmpBuf[i]);
}
DBG_8192C("\n [MPT], pExtC2h->extendId=0x%x\n", pExtC2h->extendId);
switch(pExtC2h->extendId)
{
case EXT_C2H_WIFI_FW_ACTIVE_RSP:
DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n");
DBG_8192C("[MPT], pExtC2h->buf hex: \n");
for(i=0;i<=(length-3);i++)
DBG_8192C(" 0x%x ",pExtC2h->buf[i]);
//PlatformSetEvent(&pMptCtx->MptH2cRspEvent);
pMptCtx->MptH2cRspEvent=_TRUE;
_rtw_up_sema(&pMptCtx->MPh2c_Sema);
break;
case EXT_C2H_TRIG_BY_BT_FW:
DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n");
//PlatformMoveMemory(&pMptCtx->c2hBuf[0], tmpBuf, length);
_rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length);
DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode);
DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen);
DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer);
DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum);
DBG_8192C("[MPT], pExtC2h->buf hex: \n");
for(i=0;i<=(length-3);i++)
DBG_8192C(" 0x%x ",pExtC2h->buf[0]);
//PlatformSetEvent(&pMptCtx->MptBtC2hEvent);
pMptCtx->MptBtC2hEvent=_TRUE;
_rtw_up_sema(&pMptCtx->MPh2c_Sema);
break;
default:
break;
}
}
s32 rtl8723as_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
{
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
s32 err;
if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS)
{
rtw_free_xmitframe(pxmitpriv, pxmitframe);
// Trick, make the statistics correct
pxmitpriv->tx_pkts--;
pxmitpriv->tx_drop++;
}
else
{
#ifdef CONFIG_SDIO_TX_TASKLET
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
#else
_rtw_up_sema(&pHalData->SdioXmitSema);
#endif
}
return err;
}
void rtw_os_xmit_schedule(_adapter *padapter)
{
#ifdef CONFIG_SDIO_HCI
if(!padapter)
return;
if (rtw_txframes_pending(padapter))
_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
#else
_irqL irqL;
struct xmit_priv *pxmitpriv;
if(!padapter)
return;
pxmitpriv = &padapter->xmitpriv;
_enter_critical_bh(&pxmitpriv->lock, &irqL);
if(rtw_txframes_pending(padapter))
{
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
_exit_critical_bh(&pxmitpriv->lock, &irqL);
#endif
}
thread_return rtl8723bs_xmit_thread(thread_context context)
{
s32 ret;
PADAPTER padapter;
struct xmit_priv *pxmitpriv;
u8 thread_name[20] = "RTWHALXT";
ret = _SUCCESS;
padapter = (PADAPTER)context;
pxmitpriv = &padapter->xmitpriv;
rtw_sprintf(thread_name, 20, "%s-"ADPT_FMT, thread_name, ADPT_ARG(padapter));
thread_enter(thread_name);
DBG_871X("start "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
// For now, no one would down sema to check thread is running,
// so mark this temporary, Lucas@20130820
// _rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema);
do {
ret = rtl8723bs_xmit_handler(padapter);
if (signal_pending(current)) {
flush_signals(current);
}
} while (_SUCCESS == ret);
_rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema);
RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__));
thread_exit();
}
thread_return rtw_xmit_thread(thread_context context)
{
s32 err;
PADAPTER padapter;
err = _SUCCESS;
padapter = (PADAPTER)context;
#if 0
thread_enter(padapter->pnetdev);
#else
// daemonize("%s", padapter->pnetdev->name);
daemonize("%s", "RTW_XMIT_THREAD");
allow_signal(SIGTERM);
#endif
do {
err = hal_xmit_handler(padapter);
if (signal_pending(current)) {
flush_signals(current);
}
} while (_SUCCESS == err);
_rtw_up_sema(&padapter->xmitpriv.terminate_xmitthread_sema);
thread_exit();
}
thread_return rtl8723as_xmit_thread(thread_context context)
{
PADAPTER padapter;
struct xmit_priv *pxmitpriv;
PHAL_DATA_TYPE phal;
s32 ret;
padapter = (PADAPTER)context;
pxmitpriv = &padapter->xmitpriv;
phal = GET_HAL_DATA(padapter);
ret = _SUCCESS;
thread_enter("RTWHALXT");
do {
ret = rtl8723as_xmit_handler(padapter);
if (signal_pending(current)) {
flush_signals(current);
}
} while (_SUCCESS == ret);
_rtw_up_sema(&phal->SdioXmitTerminateSema);
RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__));
thread_exit();
}
DWORD usb_write_scsi_complete(LPVOID pTxContext)
{
#ifndef PLATFORM_OS_CE
struct SCSI_BUFFER_ENTRY *psb_entry = (struct SCSI_BUFFER_ENTRY *)pTxContext;
_adapter *padapter = psb_entry->padapter;
struct SCSI_BUFFER *psb = padapter->pscsi_buf;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct dvobj_priv *pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
LPCUSB_FUNCS lpUsbFuncs = pdvobj_priv->pUsbExtension->_lpUsbFuncs;
int fComplete =_FALSE;
DWORD dwBytesTransferred = 0;
DWORD dwErr = USB_CANCELED_ERROR;
_func_enter_;
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u): circ_space = %d\n",__FUNCTION__, __LINE__, CIRC_SPACE( psb->head,psb->tail, SCSI_BUFFER_NUMBER)));
#if 1
(*lpUsbFuncs->lpGetTransferStatus)(psb_entry->usb_transfer_scsi_txcmd, &dwBytesTransferred, &dwErr);
fComplete = (*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd);
if(fComplete!=_TRUE)
{
RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_scsi_complete CloseTransfer before complete\n"));
}
(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
#else
if((*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd))
(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
#endif
memset(psb_entry->entry_memory, 0, 8);
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
if((psb->tail+1)==SCSI_BUFFER_NUMBER)
psb->tail=0;
else
psb->tail++;
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
if(CIRC_CNT(psb->head,psb->tail,SCSI_BUFFER_NUMBER)==0){
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("write_txcmd_scsififo_callback: up_sema\n"));
_rtw_up_sema(&pxmitpriv->xmit_sema);
}
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
if(padapter->bSurpriseRemoved) {
return STATUS_MORE_PROCESSING_REQUIRED;
}
_func_exit_;
#endif
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
return STATUS_MORE_PROCESSING_REQUIRED;
}
void rtw_stop_drv_threads(struct adapter *padapter)
{
RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+rtw_stop_drv_threads\n"));
/* Below is to termindate rtw_cmd_thread & event_thread... */
_rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema);
if (padapter->cmdThread)
_rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema);
rtw_hal_stop_thread(padapter);
}
/*
* Caller:ISR handler...
*
* This will be called when CPWM interrupt is up.
*
* using to update cpwn of drv; and drv willl make a decision to up or down pwr level
*/
void cpwm_int_hdl(struct rtw_adapter *padapter,
struct reportpwrstate_parm *preportpwrstate)
{
struct pwrctrl_priv *pwrpriv;
pwrpriv = &padapter->pwrctrlpriv;
pwrpriv->cpwm = PS_STATE(preportpwrstate->state);
pwrpriv->cpwm_tog = preportpwrstate->state & PS_TOGGLE;
if (pwrpriv->cpwm >= PS_STATE_S2) {
if (pwrpriv->alives & CMD_ALIVE)
_rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema);
if (pwrpriv->alives & XMIT_ALIVE)
_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
}
exit:
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("cpwm_int_hdl: cpwm=0x%02x\n", pwrpriv->cpwm));
}
s32 rtl8195as_hal_xmit(PADAPTER padapter, struct xmit_buf *pxmitbuf)
{
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
_func_enter_;
//enqueue xmitbuf
_enter_critical_bh(&pxmitpriv->xmitbuf_pending_queue.lock, &irqL);
rtw_list_insert_tail(&pxmitbuf->list, get_list_head(&pxmitpriv->xmitbuf_pending_queue));
_exit_critical_bh(&pxmitpriv->xmitbuf_pending_queue.lock, &irqL);
_func_exit_;
_rtw_up_sema(&pxmitpriv->xmit_sema);
return _TRUE;
}
void rtw_os_xmit_schedule(_adapter *padapter)
{
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
_adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
if (!padapter)
return;
if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE)
_rtw_up_sema(&pri_adapter->xmitpriv.xmit_sema);
#else
_irqL irqL;
struct xmit_priv *pxmitpriv;
if (!padapter)
return;
pxmitpriv = &padapter->xmitpriv;
_enter_critical_bh(&pxmitpriv->lock, &irqL);
if (rtw_txframes_pending(padapter))
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
_exit_critical_bh(&pxmitpriv->lock, &irqL);
#if defined(CONFIG_PCI_HCI) && defined(CONFIG_XMIT_THREAD_MODE)
if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE)
_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
#endif
#endif
}
void MPh2c_timeout_handle(void *FunctionContext)
{
_adapter *pAdapter = (_adapter *)FunctionContext;
PMPT_CONTEXT pMptCtx=&pAdapter->mppriv.MptCtx;
DBG_8192C("[MPT], MPh2c_timeout_handle \n");
pMptCtx->bMPh2c_timeout=_TRUE;
_rtw_up_sema(&pMptCtx->MPh2c_Sema);
//_cancel_timer_ex( &pMptCtx->MPh2c_timeout_timer);
return;
}
static void sd_recv_loopback(PADAPTER padapter, u32 size)
{
PLOOPBACKDATA ploopback;
u32 readsize, allocsize;
u8 *preadbuf;
readsize = size;
DBG_8192C("%s: read size=%d\n", __func__, readsize);
allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len);
ploopback = padapter->ploopback;
if (ploopback) {
ploopback->rxsize = readsize;
preadbuf = ploopback->rxbuf;
}
else {
preadbuf = rtw_malloc(allocsize);
if (preadbuf == NULL) {
DBG_8192C("%s: malloc fail size=%d\n", __func__, allocsize);
return;
}
}
// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf);
sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf);
if (ploopback)
_rtw_up_sema(&ploopback->sema);
else {
u32 i;
DBG_8192C("%s: drop pkt\n", __func__);
for (i = 0; i < readsize; i+=4) {
DBG_8192C("%08X", *(u32*)(preadbuf + i));
if ((i+4) & 0x1F) printk(" ");
else printk("\n");
}
printk("\n");
rtw_mfree(preadbuf, allocsize);
}
}
/*
* Description:
* Handle xmitframe(packet) come from rtw_xmit()
*
* Return:
* _TRUE dump packet directly ok
* _FALSE enqueue, temporary can't transmit packets to hardware
*/
s32 rtl8723as_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe)
{
struct xmit_priv *pxmitpriv;
PHAL_DATA_TYPE phal;
_irqL irql;
s32 err;
pxmitframe->attrib.qsel = pxmitframe->attrib.priority;
pxmitpriv = &padapter->xmitpriv;
phal = GET_HAL_DATA(padapter);
#ifdef CONFIG_80211N_HT
if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
(pxmitframe->attrib.ether_type != 0x0806) &&
(pxmitframe->attrib.ether_type != 0x888e) &&
(pxmitframe->attrib.dhcp_pkt != 1))
{
if (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)
rtw_issue_addbareq_cmd(padapter, pxmitframe);
}
#endif
_enter_critical_bh(&pxmitpriv->lock, &irql);
err = rtw_xmitframe_enqueue(padapter, pxmitframe);
_exit_critical_bh(&pxmitpriv->lock, &irql);
if (err != _SUCCESS) {
RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("rtl8723as_hal_xmit: enqueue xmitframe fail\n"));
rtw_free_xmitframe(pxmitpriv, pxmitframe);
// Trick, make the statistics correct
pxmitpriv->tx_pkts--;
pxmitpriv->tx_drop++;
return _TRUE;
}
_rtw_up_sema(&phal->SdioXmitSema);
return _FALSE;
}
s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
{
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
s32 err;
if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS)
{
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitpriv->tx_drop++;
}
else
{
#ifdef CONFIG_SDIO_TX_TASKLET
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
#else
_rtw_up_sema(&pxmitpriv->SdioXmitSema);
#endif
}
return err;
}
void rtw_os_xmit_schedule(_adapter *padapter)
{
_adapter *pri_adapter = padapter;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
if(!padapter)
return;
#ifdef CONFIG_CONCURRENT_MODE
if(padapter->adapter_type > PRIMARY_ADAPTER)
pri_adapter = padapter->pbuddy_adapter;
#endif
if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE)
_rtw_up_sema(&pri_adapter->xmitpriv.xmit_sema);
#else
_irqL irqL;
struct xmit_priv *pxmitpriv;
if(!padapter)
return;
pxmitpriv = &padapter->xmitpriv;
_enter_critical_bh(&pxmitpriv->lock, &irqL);
if(rtw_txframes_pending(padapter))
{
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
_exit_critical_bh(&pxmitpriv->lock, &irqL);
#endif
}
DWORD usb_write_mem_complete( LPVOID Context )
{
int fComplete =_FALSE;
DWORD dwBytes = 0;
DWORD dwErr = USB_CANCELED_ERROR;
_irqL irqL;
_list *head;
_list *plist;
struct io_req *pio_req;
struct io_queue *pio_q = (struct io_queue *) Context;
struct intf_hdl *pintf = &(pio_q->intf);
struct intf_priv *pintfpriv = pintf->pintfpriv;
_adapter *padapter = (_adapter *)pintf->adapter;
NTSTATUS status = STATUS_SUCCESS;
struct xmit_priv * pxmitpriv = &padapter->xmitpriv;
struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev;
USB_HANDLE usbHandle = pdvobj_priv->usb_extension._hDevice;
LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
// get the head from the processing io_queue
head = &(pio_q->processing);
_func_enter_;
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_mem_complete %p\n", Context));
#if 1
_enter_critical_bh(&(pio_q->lock), &irqL);
//free irp in processing list...
while(rtw_is_list_empty(head) != _TRUE)
{
plist = get_next(head);
list_delete(plist);
pio_req = LIST_CONTAINOR(plist, struct io_req, list);
_rtw_up_sema(&pio_req->sema);
}
_exit_critical_bh(&(pio_q->lock), &irqL);
#endif
#if 1
(*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr);
fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem);
if(fComplete!=_TRUE)
{
RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem_complete CloseTransfer before complete\n"));
}
(*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem );
#endif
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem_complete\n"));
_func_exit_;
return STATUS_MORE_PROCESSING_REQUIRED;
}
DWORD usb_write_port_complete( LPVOID Context )
{
// u8 *ptr;
struct xmit_frame * pxmitframe = (struct xmit_frame *) Context;
_adapter * padapter = pxmitframe->padapter;
struct dvobj_priv * pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
struct xmit_priv * pxmitpriv = &padapter->xmitpriv;
struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
int fComplete =_FALSE;
DWORD dwBytesTransferred = 0;
DWORD dwErr = USB_CANCELED_ERROR;
RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u), pxmitframe %X\n",__FUNCTION__, __LINE__, Context));
_func_enter_;
RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("+usb_write_port_complete\n"));
_rtw_spinlock_ex(&pxmitpriv->lock);
pxmitpriv->txirp_cnt--;
_rtw_spinunlock_ex(&pxmitpriv->lock);
if(pxmitpriv->txirp_cnt==0){
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));
_rtw_up_sema(&(pxmitpriv->tx_retevt));
}
//not to consider tx fragment
rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
#if 1
(*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr);
fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port);
if(fComplete!=_TRUE)
{
RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete CloseTransfer before complete\n"));
}
(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
#else
if((*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port))
{
(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
}
#endif
RT_TRACE( _module_hci_ops_os_c_, _drv_info_,
("%s(%u): pxmitpriv %X pxmitpriv->free_xmitframe_cnt %X pxmitframe->padapter %X pxmitframe->padapter %X\n",
__LINE__, pxmitpriv, pxmitpriv->free_xmitframe_cnt, pxmitframe->padapter));
rtw_xmitframe_complete(padapter, pxmitpriv, pxmitbuf);
_func_exit_;
return STATUS_SUCCESS;
}
void sd_int_dpc(PADAPTER padapter)
{
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct intf_hdl * pintfhdl=&padapter->iopriv.intf;
#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
if (pHalData->sdio_hisr & SDIO_HISR_AVAL)
{
//_irqL irql;
u8 freepage[4];
_sdio_local_read(padapter, SDIO_REG_FREE_TXPG, 4, freepage);
//_enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql);
//_rtw_memcpy(pHalData->SdioTxFIFOFreePage, freepage, 4);
//_exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql);
//DBG_871X("SDIO_HISR_AVAL, Tx Free Page = 0x%x%x%x%x\n",
// freepage[0],
// freepage[1],
// freepage[2],
// freepage[3]);
_rtw_up_sema(&(padapter->xmitpriv.xmit_sema));
}
#endif
if (pHalData->sdio_hisr & SDIO_HISR_CPWM1)
{
struct reportpwrstate_parm report;
#ifdef CONFIG_LPS_RPWM_TIMER
u8 bcancelled;
_cancel_timer(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer), &bcancelled);
#endif // CONFIG_LPS_RPWM_TIMER
_sdio_local_read(padapter, SDIO_REG_HCPWM1, 1, &report.state);
#ifdef CONFIG_LPS_LCLK
//88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow.
//modify by Thomas. 2012/4/2.
#ifdef CONFIG_EXT_CLK //for sprd
if(report.state & BIT(4)) //indicate FW entering 32k
{
u8 chk_cnt = 0;
do{
if(_sdio_read8(padapter, 0x90)&BIT(0))//FW in 32k already
{
if(pwrpriv->rpwm < PS_STATE_S2)
{
//DBG_871X("disable ext clk when FW in LPS-32K already!\n");
EnableGpio5ClockReq(padapter, _TRUE, 0);
}
break;
}
chk_cnt++;
}while(chk_cnt<10);
if(chk_cnt==10)
{
DBG_871X("polling fw in 32k already, fail!\n");
}
}
else //indicate fw leaving 32K
#endif //CONFIG_EXT_CLK
{
report.state |= PS_STATE_S2;
//cpwm_int_hdl(padapter, &report);
_set_workitem(&(pwrpriv->cpwm_event));
}
#endif
}
#ifdef CONFIG_WOWLAN
if (pHalData->sdio_hisr & SDIO_HISR_CPWM2) {
u32 value;
value = rtw_read32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR);
DBG_871X_LEVEL(_drv_always_, "Reset SDIO HISR(0x%08x) original:0x%08x\n",
SDIO_LOCAL_BASE+SDIO_REG_HISR, value);
value |= BIT19;
rtw_write32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR, value);
value = rtw_read8(padapter, SDIO_LOCAL_BASE+SDIO_REG_HIMR+2);
DBG_871X_LEVEL(_drv_always_, "Reset SDIO HIMR CPWM2(0x%08x) original:0x%02x\n",
SDIO_LOCAL_BASE+SDIO_REG_HIMR + 2, value);
}
#endif
if (pHalData->sdio_hisr & SDIO_HISR_TXERR)
{
u8 *status;
u32 addr;
status = rtw_malloc(4);
if (status)
{
addr = REG_TXDMA_STATUS;
HalSdioGetCmdAddr8723ASdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr);
_sd_read(pintfhdl, addr, 4, status);
_sd_write(pintfhdl, addr, 4, status);
DBG_8192C("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32*)status));
rtw_mfree(status, 4);
} else {
DBG_8192C("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__);
}
}
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT)
#endif
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
if (pHalData->sdio_hisr & (SDIO_HISR_TXBCNOK|SDIO_HISR_TXBCNERR))
#endif
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#if 0 //for debug
if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT)
DBG_8192C("%s: SDIO_HISR_BCNERLY_INT\n", __func__);
if (pHalData->sdio_hisr & SDIO_HISR_TXBCNOK)
DBG_8192C("%s: SDIO_HISR_TXBCNOK\n", __func__);
if (pHalData->sdio_hisr & SDIO_HISR_TXBCNERR)
DBG_8192C("%s: SDIO_HISR_TXBCNERR\n", __func__);
#endif
if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(pmlmepriv->update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter);
}
}
#ifdef CONFIG_CONCURRENT_MODE
if(check_buddy_fwstate(padapter, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter->pbuddy_adapter);
}
}
#endif
}
#endif //CONFIG_INTERRUPT_BASED_TXBCN
#ifdef CONFIG_EXT_CLK
if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if(check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE))
{
//DBG_8192C("BCNERLY_INT for enabling ext clk\n");
EnableGpio5ClockReq(padapter, _TRUE, 1);
}
}
#endif //CONFIG_EXT_CLK
if (pHalData->sdio_hisr & SDIO_HISR_C2HCMD)
{
DBG_8192C("%s: C2H Command\n", __func__);
}
if (pHalData->sdio_hisr & SDIO_HISR_RX_REQUEST)
{
struct recv_buf *precvbuf;
//DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize);
pHalData->sdio_hisr ^= SDIO_HISR_RX_REQUEST;
#ifdef CONFIG_MAC_LOOPBACK_DRIVER
sd_recv_loopback(padapter, pHalData->SdioRxFIFOSize);
#else
do {
//Sometimes rx length will be zero. driver need to use cmd53 read again.
if(pHalData->SdioRxFIFOSize == 0)
{
u8 data[4];
_sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data);
pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)data);
}
if(pHalData->SdioRxFIFOSize)
{
precvbuf = sd_recv_rxfifo(padapter, pHalData->SdioRxFIFOSize);
pHalData->SdioRxFIFOSize = 0;
if (precvbuf)
sd_rxhandler(padapter, precvbuf);
else
break;
}
else
break;
#ifdef CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP
} while (0);
#else
} while (1);
#endif
#endif
}
void sd_int_dpc(PADAPTER padapter)
{
PHAL_DATA_TYPE phal;
struct dvobj_priv *dvobj;
struct intf_hdl * pintfhdl=&padapter->iopriv.intf;
struct pwrctrl_priv *pwrctl;
phal = GET_HAL_DATA(padapter);
dvobj = adapter_to_dvobj(padapter);
pwrctl = dvobj_to_pwrctl(dvobj);
#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
if (phal->sdio_hisr & SDIO_HISR_AVAL)
{
//_irqL irql;
u8 freepage[4];
_sdio_local_read(padapter, SDIO_REG_FREE_TXPG, 4, freepage);
//_enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql);
//_rtw_memcpy(phal->SdioTxFIFOFreePage, freepage, 4);
//_exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql);
//DBG_871X("SDIO_HISR_AVAL, Tx Free Page = 0x%x%x%x%x\n",
// freepage[0],
// freepage[1],
// freepage[2],
// freepage[3]);
_rtw_up_sema(&(padapter->xmitpriv.xmit_sema));
}
#endif
if (phal->sdio_hisr & SDIO_HISR_CPWM1)
{
struct reportpwrstate_parm report;
#ifdef CONFIG_LPS_RPWM_TIMER
u8 bcancelled;
_cancel_timer(&(pwrctl->pwr_rpwm_timer), &bcancelled);
#endif // CONFIG_LPS_RPWM_TIMER
report.state = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HCPWM1_8723B);
#ifdef CONFIG_LPS_LCLK
//cpwm_int_hdl(padapter, &report);
_set_workitem(&(pwrctl->cpwm_event));
#endif
}
if (phal->sdio_hisr & SDIO_HISR_TXERR)
{
u8 *status;
u32 addr;
status = rtw_malloc(4);
if (status)
{
addr = REG_TXDMA_STATUS;
HalSdioGetCmdAddr8723BSdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr);
_sd_read(pintfhdl, addr, 4, status);
_sd_write(pintfhdl, addr, 4, status);
DBG_8192C("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32*)status));
rtw_mfree(status, 4);
} else {
DBG_8192C("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__);
}
}
if (phal->sdio_hisr & SDIO_HISR_TXBCNOK)
{
DBG_8192C("%s: SDIO_HISR_TXBCNOK\n", __func__);
}
if (phal->sdio_hisr & SDIO_HISR_TXBCNERR)
{
DBG_8192C("%s: SDIO_HISR_TXBCNERR\n", __func__);
}
#ifndef CONFIG_C2H_PACKET_EN
if (phal->sdio_hisr & SDIO_HISR_C2HCMD)
{
struct c2h_evt_hdr_88xx *c2h_evt;
DBG_8192C("%s: C2H Command\n", __func__);
if ((c2h_evt = (struct c2h_evt_hdr_88xx*)rtw_zmalloc(16)) != NULL) {
if (rtw_hal_c2h_evt_read(padapter, (u8 *)c2h_evt) == _SUCCESS) {
if (c2h_id_filter_ccx_8723b((u8 *)c2h_evt)) {
/* Handle CCX report here */
rtw_hal_c2h_handler(padapter, (u8 *)c2h_evt);
rtw_mfree((u8*)c2h_evt, 16);
} else {
rtw_c2h_wk_cmd(padapter, (u8 *)c2h_evt);
}
}
} else {
/* Error handling for malloc fail */
if (rtw_cbuf_push(padapter->evtpriv.c2h_queue, (void*)NULL) != _SUCCESS)
DBG_871X("%s rtw_cbuf_push fail\n", __func__);
_set_workitem(&padapter->evtpriv.c2h_wk);
}
}
#endif
if (phal->sdio_hisr & SDIO_HISR_RXFOVW)
{
DBG_8192C("%s: Rx Overflow\n", __func__);
}
if (phal->sdio_hisr & SDIO_HISR_RXERR)
{
DBG_8192C("%s: Rx Error\n", __func__);
}
if (phal->sdio_hisr & SDIO_HISR_RX_REQUEST)
{
struct recv_buf *precvbuf;
int alloc_fail_time=0;
u32 hisr;
// DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize);
phal->sdio_hisr ^= SDIO_HISR_RX_REQUEST;
do {
phal->SdioRxFIFOSize = SdioLocalCmd52Read2Byte(padapter, SDIO_REG_RX0_REQ_LEN);
if (phal->SdioRxFIFOSize != 0)
{
#ifdef CONFIG_MAC_LOOPBACK_DRIVER
sd_recv_loopback(padapter, phal->SdioRxFIFOSize);
#else
precvbuf = sd_recv_rxfifo(padapter, phal->SdioRxFIFOSize);
if (precvbuf)
sd_rxhandler(padapter, precvbuf);
else
{
alloc_fail_time++;
DBG_871X("precvbuf is Null for %d times because alloc memory failed\n", alloc_fail_time);
if (alloc_fail_time >= 10)
break;
}
phal->SdioRxFIFOSize = 0;
#endif
}
else
break;
hisr = 0;
ReadInterrupt8723BSdio(padapter, &hisr);
hisr &= SDIO_HISR_RX_REQUEST;
if (!hisr)
break;
} while (1);
if(alloc_fail_time==10)
DBG_871X("exit because alloc memory failed more than 10 times \n");
}
}
