static void cubieboard_setup_clocks(void)
{
struct a10_ccm *ccm = (void *)A1X_CCM_BASE;
cubieboard_set_sys_clock();
/* Configure the clock source for APB1. This drives our UART */
write32(&ccm->apb1_clk_div_cfg,
APB1_CLK_SRC_OSC24M | APB1_RAT_N(0) | APB1_RAT_M(0));
/* Configure the clock for SD0 */
write32(&ccm->sd0_clk_cfg,
SDx_CLK_GATE | SDx_CLK_SRC_OSC24M | SDx_RAT_EXP_N(0) | SDx_RAT_M(1));
/* Enable clock to SD0 */
a1x_periph_clock_enable(A1X_CLKEN_MMC0);
}
static enum cb_err cubieboard_setup_power(void)
{
enum cb_err err;
const struct device * pmu;
const struct drivers_xpowers_axp209_config *cfg;
/* Find the AXP209 in devicetree */
pmu = dev_find_slot_on_smbus(AXP209_BUS, AXP209_I2C_ADDR);
if (!pmu) {
printk(BIOS_ERR, "AXP209 not found in devicetree.cb\n");
return CB_ERR;
}
cfg = pmu->chip_info;
/* Mux TWI0 pins */
gpio_set_multipin_func(GPB, GPB_TWI0_PINS, GPB_TWI0_FUNC);
/* Enable TWI0 */
a1x_periph_clock_enable(A1X_CLKEN_TWI0);
a1x_twi_init(AXP209_BUS, 400000);
if ((err = axp209_init(AXP209_BUS)) != CB_SUCCESS) {
printk(BIOS_ERR, "PMU initialization failed\n");
return err;
}
if ((err = axp209_set_voltages(AXP209_BUS, cfg)) != CB_SUCCESS) {
printk(BIOS_WARNING, "Power setup incomplete: "
"CPU may hang when increasing clock\n");
return err;
}
printk(BIOS_SPEW, "VDD CPU (DCDC2): %imv\n", cfg->dcdc2_voltage_mv);
printk(BIOS_SPEW, "VDD DLL (DCDC3): %imv\n", cfg->dcdc3_voltage_mv);
printk(BIOS_SPEW, "AVCC (LDO2) : %imv\n", cfg->ldo2_voltage_mv);
printk(BIOS_SPEW, "CSI1-IO (LDO4) : %imv\n", cfg->ldo4_voltage_mv);
printk(BIOS_SPEW, "(LDO3) : %imv\n", cfg->ldo3_voltage_mv);
return CB_SUCCESS;
}
static void cubieboard_enable_uart(void)
{
a1x_periph_clock_enable(A1X_CLKEN_UART0);
}