static int
get_status(unsigned char *adr) {
int i,c;
DISABLE_IRQ();
c = sendcmd(0,0x00,NODE_ADR | C_GETEA); /* CMD: GET ETH ADR*/
if( c < 0 ) goto gsend;
/* now read status bytes */
for (i=0; i<6; i++) {
dma_wd.fdc_acces_seccount = 0; /* request next byte */
if( !acsi_wait_for_IRQ(HZ/2) ) { /* wait for cmd ack */
c = -1;
goto gsend; /* timeout */
}
c = dma_wd.fdc_acces_seccount;
*adr++ = (unsigned char)c;
}
c = 1;
gsend:
dma_wd.dma_mode_status = 0x80;
return c;
}
static void start_print( int device )
{ struct slm *sip = &slm_info[device];
unsigned char *cmd;
unsigned long paddr;
int i;
stdma_lock( slm_interrupt, NULL );
CMDSET_TARG_LUN( slmprint_cmd, sip->target, sip->lun );
cmd = slmprint_cmd;
paddr = virt_to_phys( SLMBuffer );
dma_cache_maintenance( paddr, virt_to_phys(BufferP)-paddr, 1 );
DISABLE_IRQ();
/* Low on A1 */
dma_wd.dma_mode_status = 0x88;
MFPDELAY();
/* send the command bytes except the last */
for( i = 0; i < 5; ++i ) {
DMA_LONG_WRITE( *cmd++, 0x8a );
udelay(20);
if (!acsi_wait_for_IRQ( HZ/2 )) {
SLMError = 1;
return; /* timeout */
}
}
/* last command byte */
DMA_LONG_WRITE( *cmd++, 0x82 );
MFPDELAY();
/* set DMA address */
set_dma_addr( paddr );
/* program DMA for write and select sector counter reg */
dma_wd.dma_mode_status = 0x192;
MFPDELAY();
/* program for 255*512 bytes and start DMA */
DMA_LONG_WRITE( SLM_DMA_AMOUNT, 0x112 );
#ifndef SLM_CONT_CNT_REPROG
SLMCurAddr = paddr;
SLMEndAddr = paddr + SLMSliceSize + SLM_DMA_INT_OFFSET;
#endif
START_TIMER( DMA_STARTUP_TIME + DMA_TIME_FOR( SLMSliceSize ));
#if !defined(SLM_CONT_CNT_REPROG) && defined(DEBUG)
printk( "SLM: CurAddr=%#lx EndAddr=%#lx timer=%ld\n",
SLMCurAddr, SLMEndAddr, DMA_TIME_FOR( SLMSliceSize ) );
#endif
ENABLE_IRQ();
}
static int
sendcmd(unsigned int a0, unsigned int mod, unsigned int cmd) {
unsigned int c;
dma_wd.dma_mode_status = (mod | ((a0) ? 2 : 0) | 0x88);
dma_wd.fdc_acces_seccount = cmd;
dma_wd.dma_mode_status = (mod | 0x8a);
if( !acsi_wait_for_IRQ(HZ/2) ) /* wait for cmd ack */
return -1; /* timeout */
c = dma_wd.fdc_acces_seccount;
return (c & 0xff);
}
static int
get_frame(unsigned long paddr, int odd) {
int c;
unsigned long flags;
DISABLE_IRQ();
local_irq_save(flags);
dma_wd.dma_mode_status = 0x9a;
dma_wd.dma_mode_status = 0x19a;
dma_wd.dma_mode_status = 0x9a;
dma_wd.fdc_acces_seccount = 0x04; /* sector count (was 5) */
dma_wd.dma_lo = (unsigned char)paddr;
paddr >>= 8;
dma_wd.dma_md = (unsigned char)paddr;
paddr >>= 8;
dma_wd.dma_hi = (unsigned char)paddr;
local_irq_restore(flags);
c = sendcmd(0,0x00,NODE_ADR | C_READ); /* CMD: READ */
if( c < 128 ) goto rend;
/* now read block */
c = sendcmd(1,0x00,odd); /* odd flag for address shift */
dma_wd.dma_mode_status = 0x0a;
if( !acsi_wait_for_IRQ(100) ) { /* wait for DMA to complete */
c = -1;
goto rend;
}
dma_wd.dma_mode_status = 0x8a;
dma_wd.dma_mode_status = 0x18a;
dma_wd.dma_mode_status = 0x8a;
c = dma_wd.fdc_acces_seccount;
dma_wd.dma_mode_status = 0x88;
c = dma_wd.fdc_acces_seccount;
c = 1;
rend:
dma_wd.dma_mode_status = 0x80;
udelay(40);
acsi_wait_for_noIRQ(20);
return c;
}
static int
hardware_send_packet(unsigned long paddr, int cnt) {
unsigned int c;
unsigned long flags;
DISABLE_IRQ();
local_irq_save(flags);
dma_wd.dma_mode_status = 0x19a;
dma_wd.dma_mode_status = 0x9a;
dma_wd.dma_mode_status = 0x19a;
dma_wd.dma_lo = (unsigned char)paddr;
paddr >>= 8;
dma_wd.dma_md = (unsigned char)paddr;
paddr >>= 8;
dma_wd.dma_hi = (unsigned char)paddr;
dma_wd.fdc_acces_seccount = 0x4; /* sector count */
local_irq_restore(flags);
c = sendcmd(0,0x100,NODE_ADR | C_WRITE); /* CMD: WRITE */
c = sendcmd(1,0x100,cnt&0xff);
c = sendcmd(1,0x100,cnt>>8);
/* now write block */
dma_wd.dma_mode_status = 0x10a; /* DMA enable */
if( !acsi_wait_for_IRQ(100) ) /* wait for DMA to complete */
goto end;
dma_wd.dma_mode_status = 0x19a; /* DMA disable ! */
c = dma_wd.fdc_acces_seccount;
end:
c = sendcmd(1,0x100,0);
c = sendcmd(1,0x100,0);
dma_wd.dma_mode_status = 0x180;
udelay(40);
acsi_wait_for_noIRQ(20);
return( c & 0x02);
}
