/***************************************************************************//**
* @brief Writes parameters to the AD9122.
*
* @return Returns negative error code or 0 in case of success.
*******************************************************************************/
int32_t ad9122_write_raw(uint32_t channel,
int32_t val,
int32_t val2,
int32_t mask)
{
struct cf_axi_converter *conv = &dds_conv;
uint32_t rate;
int32_t ret;
uint32_t ctrl_reg_1;
uint32_t ctrl_reg_2;
DAC_Core_Read(ADI_REG_CNTRL_1, &ctrl_reg_1);
DAC_Core_Read(ADI_REG_CNTRL_2, &ctrl_reg_2);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
rate = ad9122_get_data_clk(conv);
ret = ad9122_set_data_clk(conv, val);
if (ret < 0) {
return ret;
}
if (val != rate) {
ret = ad9122_tune_dci(conv);
}
break;
default:
return -1;
}
DAC_Core_Write(ADI_REG_CNTRL_1, ctrl_reg_1);
DAC_Core_Write(ADI_REG_CNTRL_2, ctrl_reg_2);
return ret;
}
/***************************************************************************//**
* @brief Writes parameters to the AD9122.
*
* @return Returns negative error code or 0 in case of success.
*******************************************************************************/
int32_t ad9122_write_raw(uint32_t channel,
int32_t val,
int32_t val2,
int32_t mask)
{
struct cf_axi_converter *conv = &dds_conv;
uint32_t rate;
int32_t ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
rate = ad9122_get_data_clk(conv);
ret = ad9122_set_data_clk(conv, val);
if (ret < 0) {
return ret;
}
if (val != rate) {
ad9122_tune_dci(conv);
}
break;
default:
return -1;
}
return 0;
}
/***************************************************************************//**
* @brief Initializes the AD9122.
*
* @param pfnSetDataClock - Pointer to a function which sets the data clock
* @param pfnSetDacClock - Pointer to a function which sets the DAC clock
* @param pfnRoundRateDataClock - Pointer to a function which computes the
* actual data clock for a desired clock value
* @param pfnRoundRateDacClock - Pointer to a function which computes the
* actual DAC clock for a desired clock value
*
* @return Returns negative error code or 0 in case of success.
*******************************************************************************/
int32_t ad9122_setup(void* pfnSetDataClock, void* pfnSetDacClock,
void* pfnRoundRateDataClock, void* pfnRoundRateDacClock)
{
int32_t ret;
int32_t i;
uint32_t datapath_ctrl, rate;
struct cf_axi_converter *conv = &dds_conv;
if(ad9122_reset() < 0)
return -1;
pfnSetDataClk = pfnSetDataClock;
pfnSetDacClk = pfnSetDacClock;
pfnRoundRateDataClk = pfnRoundRateDataClock;
pfnRoundRateDacClk = pfnRoundRateDacClock;
conv->write = ad9122_write;
conv->read = ad9122_read;
conv->setup = ad9122_tune_dci;
conv->get_fifo_status = ad9122_get_fifo_status;
conv->get_data_clk = ad9122_get_data_clk;
conv->write_raw = ad9122_write_raw;
conv->read_raw = ad9122_read_raw;
for (i = 0; i < ARRAY_SIZE(ad9122_reg_defaults); i++)
{
ad9122_write(ad9122_reg_defaults[i][0],
ad9122_reg_defaults[i][1]);
}
if(ad9122_sync() < 0)
return -1;
conv->interp_factor = 1;
conv->interp_factor = ad9122_validate_interp_factor(conv->interp_factor);
conv->fcenter_shift = 0;
datapath_ctrl = AD9122_DATAPATH_CTRL_BYPASS_PREMOD |
AD9122_DATAPATH_CTRL_BYPASS_NCO |
AD9122_DATAPATH_CTRL_BYPASS_INV_SINC;
ad9122_write(AD9122_REG_DATAPATH_CTRL, datapath_ctrl);
rate = 491520000;
ret = ad9122_set_interpol(conv, conv->interp_factor,
conv->fcenter_shift, rate);
#ifdef CF_AXI_DDS
cf_axi_dds_of_probe();
#else
ret = ad9122_tune_dci(conv);
#endif
return ret;
}
/***************************************************************************//**
* @brief Calibrates the AD9122 DCI.
*
* @return Returns negative error code or 0 in case of success.
*******************************************************************************/
int32_t ad9122_dci_calibrate()
{
return ad9122_tune_dci(&dds_conv);
}
