static int scb9328_devices_init(void)
{
int i;
imx_gpio_mode(PA23_PF_CS5);
imx_gpio_mode(GPIO_PORTB | GPIO_GPIO | GPIO_OUT | 21);
imx_gpio_mode(GPIO_PORTB | GPIO_GPIO | GPIO_OUT | 22);
imx_gpio_mode(GPIO_PORTB | GPIO_GPIO | GPIO_OUT | 23);
imx_gpio_mode(GPIO_PORTB | GPIO_GPIO | GPIO_OUT | 24);
for (i = 0; i < ARRAY_SIZE(leds); i++)
led_gpio_register(&leds[i]);
/* CS3 becomes CS3 by clearing reset default bit 1 in FMCR */
writel(0x1, MX1_SCM_BASE_ADDR + MX1_FMCR);
imx1_setup_eimcs(0, 0x000F2000, 0x11110d01);
imx1_setup_eimcs(1, 0x000F0a00, 0x11110601);
imx1_setup_eimcs(3, 0x000FFFFF, 0x00000303);
imx1_setup_eimcs(4, 0x000F0a00, 0x11110301);
imx1_setup_eimcs(5, 0x00008400, 0x00000D03);
add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0x10000000, 16 * 1024 * 1024, 0);
add_dm9000_device(DEVICE_ID_DYNAMIC, 0x16000000, 0x16000004,
IORESOURCE_MEM_16BIT, &dm9000_data);
devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0");
devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
armlinux_set_bootparams((void *)0x08000100);
armlinux_set_architecture(MACH_TYPE_SCB9328);
return 0;
}
static void __init ek_add_device_dm9000(void)
{
/* Configure chip-select 2 (DM9000) */
sam9_smc_configure(0, 2, &dm9000_smc_config);
/* Configure Reset signal as output */
at91_set_gpio_output(AT91_PIN_PC10, 0);
/* Configure Interrupt pin as input, no pull-up */
at91_set_gpio_input(AT91_PIN_PC11, 0);
add_dm9000_device(0, AT91_CHIPSELECT_2, AT91_CHIPSELECT_2 + 4,
IORESOURCE_MEM_16BIT, &dm9000_data);
}
static int mini2440_devices_init(void)
{
uint32_t reg;
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
reg = readl(S3C_BWSCON);
/* CS#4 to access the network controller */
reg &= ~0x000f0000;
reg |= 0x000d0000; /* 16 bit */
writel(0x1f4c, S3C_BANKCON4);
writel(reg, S3C_BWSCON);
/* release the reset signal to external devices */
reg = readl(S3C_MISCCR);
reg |= 0x10000;
writel(reg, S3C_MISCCR);
add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
0, IORESOURCE_MEM, &nand_info);
add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
devfs_del_partition("self_raw");
devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_del_partition("env_raw");
devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
#endif
add_generic_device("s3c_mci", 0, NULL, S3C2410_SDI_BASE, 0,
IORESOURCE_MEM, &mci_data);
add_generic_device("s3c_fb", 0, NULL, S3C2410_LCD_BASE, 0,
IORESOURCE_MEM, &s3c24x0_fb_data);
add_generic_device("ohci", 0, NULL, S3C2410_USB_HOST_BASE, 0x100,
IORESOURCE_MEM, NULL);
armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_MINI2440);
return 0;
}
static int tiny6410evk_devices_init(void)
{
int i;
/* init CPU card specific devices first */
tiny6410_init("FA EVK");
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(tiny6410evk_pin_usage); i++)
s3c_gpio_mode(tiny6410evk_pin_usage[i]);
tiny6410evk_setup_dm9000_cs();
add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
return 0;
}
static int mini6410_devices_init(void)
{
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
mini6410_setup_dm9000_cs();
add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
armlinux_set_architecture(MACH_TYPE_MINI6410);
return 0;
}
static int mini2440_devices_init(void)
{
uint32_t reg;
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
reg = readl(S3C_BWSCON);
/* CS#4 to access the network controller */
reg &= ~0x000f0000;
reg |= 0x000d0000; /* 16 bit */
writel(0x1f4c, S3C_BANKCON4);
writel(reg, S3C_BWSCON);
/* release the reset signal to external devices */
reg = readl(S3C_MISCCR);
reg |= 0x10000;
writel(reg, S3C_MISCCR);
s3c24xx_add_nand(&nand_info);
add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
devfs_del_partition("self_raw");
devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_del_partition("env_raw");
devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
s3c24x0_bbu_nand_register_handler();
#endif
s3c24xx_add_mci(&mci_data);
s3c24xx_add_fb(&s3c24x0_fb_data);
s3c24xx_add_ohci();
armlinux_set_architecture(MACH_TYPE_MINI2440);
return 0;
}
static void mini210s_eth_init(void)
{
uint32_t reg;
/* Configure SROM bank1
*
* 16-bit, no wait
* Tacs/Tacc/Tach: 0ck/6ck/0ck
* Tcos/Tcoh: 0ck/0ck
* Tacp/PMC: 0ck/Normal
*/
reg = readl(S3C_BWSCON);
reg &= ~0x000000f0;
reg |= 0x00000010;
writel(reg, S3C_BWSCON);
writel(0x00050000, S3C_BANKCON1);
add_dm9000_device(0, S3C_CS1_BASE, S3C_CS1_BASE + 8,
IORESOURCE_MEM_16BIT, &dm9000_data);
}
