static int pcm049_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, OMAP44XX_UART3_BASE, 1024, IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int pc_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, 0x3f8, 8, 0, &serial_plat);
return 0;
}
static int tegra_add_debug_console(void)
{
unsigned long base = 0;
if (!of_machine_is_compatible("nvidia,tegra20") &&
!of_machine_is_compatible("nvidia,tegra30"))
return 0;
/* figure out which UART to use */
if (IS_ENABLED(CONFIG_TEGRA_UART_NONE))
return 0;
if (IS_ENABLED(CONFIG_TEGRA_UART_ODMDATA))
base = tegra20_get_debuguart_base();
if (IS_ENABLED(CONFIG_TEGRA_UART_A))
base = TEGRA_UARTA_BASE;
if (IS_ENABLED(CONFIG_TEGRA_UART_B))
base = TEGRA_UARTB_BASE;
if (IS_ENABLED(CONFIG_TEGRA_UART_C))
base = TEGRA_UARTC_BASE;
if (IS_ENABLED(CONFIG_TEGRA_UART_D))
base = TEGRA_UARTD_BASE;
if (IS_ENABLED(CONFIG_TEGRA_UART_E))
base = TEGRA_UARTE_BASE;
if (!base)
return -ENODEV;
debug_uart.clock = tegra_get_pllp_rate();
add_ns16550_device(DEVICE_ID_DYNAMIC, base, 8 << debug_uart.shift,
IORESOURCE_MEM | IORESOURCE_MEM_8BIT, &debug_uart);
return 0;
}
static int malta_console_init(void)
{
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, DEBUG_LL_UART_ADDR, 8,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int rzx50_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, UART1_BASE, 8 << JZ4750D_UART_SHIFT,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int ac100_serial_console_init(void)
{
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, TEGRA_UARTA_BASE, 8 << serial_plat.shift,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static void socfpga_uart_init(void)
{
clks[uart] = clk_fixed("uart", 100000000);
clkdev_add_physbase(clks[uart], CYCLONE5_UART0_ADDRESS, NULL);
clkdev_add_physbase(clks[uart], CYCLONE5_UART1_ADDRESS, NULL);
add_ns16550_device(0, 0xffc02000, 1024, IORESOURCE_MEM |
IORESOURCE_MEM_8BIT, &uart_pdata);
}
static int pcaaxl2_console_init(void)
{
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, OMAP44XX_UART3_BASE, 1024,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int dir320_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, DEBUG_LL_UART_ADDR, 8,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int dove_add_uart(void)
{
uart_plat.clock = clk_get_rate(tclk);
if (!add_ns16550_device(DEVICE_ID_DYNAMIC,
(unsigned int)CONSOLE_UART_BASE, 32,
IORESOURCE_MEM_32BIT, &uart_plat))
return -ENODEV;
return 0;
}
static int pc_console_init(void)
{
barebox_set_model("X86 generic barebox");
barebox_set_hostname("x86");
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, 0x3f8, 8, 0, &serial_plat);
return 0;
}
static int p1010rdb_console_init(void)
{
barebox_set_model("Freescale P1010RDB");
barebox_set_hostname("p1010rdb");
serial_plat.clock = fsl_get_bus_freq(0);
add_ns16550_device(1, CFG_IMMR + 0x4500, 16,
IORESOURCE_MEM | IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int dir320_console_init(void)
{
barebox_set_model("D-Link DIR-320");
barebox_set_hostname("dir320");
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, DEBUG_LL_UART_ADDR, 8,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
static int p2020_console_init(void)
{
barebox_set_model("Freescale P2020 RDB");
barebox_set_hostname("p2020rdb");
serial_plat.clock = fsl_get_bus_freq(0);
add_ns16550_device(DEVICE_ID_DYNAMIC, 0xffe04500, 16, IORESOURCE_MEM_8BIT,
&serial_plat);
return 0;
}
/**
* @brief Initialize the serial port to be used as console.
*
* @return result of device registration
*/
static int omap3evm_init_console(void)
{
add_ns16550_device(DEVICE_ID_DYNAMIC,
#if defined(CONFIG_OMAP3EVM_UART1)
OMAP_UART1_BASE,
#elif defined(CONFIG_OMAP3EVM_UART3)
OMAP_UART3_BASE,
#endif
1024, IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
struct device_d *jz_add_uart(int id, unsigned long base, unsigned int clock)
{
struct NS16550_plat *serial_plat;
serial_plat = xzalloc(sizeof(*serial_plat));
serial_plat->shift = JZ_UART_SHIFT;
serial_plat->reg_write = &jz_serial_reg_write;
serial_plat->clock = clock;
return add_ns16550_device(id, base, 8 << JZ_UART_SHIFT,
IORESOURCE_MEM_8BIT, serial_plat);
}
static int eukrea_cpuimx27_console_init(void)
{
#ifdef CONFIG_DRIVER_SERIAL_IMX
imx_add_uart((void *)IMX_UART1_BASE, DEVICE_ID_DYNAMIC);
#endif
/* configure 8 bit UART on cs3 */
FMCR &= ~0x2;
imx27_setup_weimcs(3, 0x0000D603, 0x0D1D0D01, 0x00D20000);
#ifdef CONFIG_DRIVER_SERIAL_NS16550
add_ns16550_device(DEVICE_ID_DYNAMIC, IMX_CS3_BASE + QUART_OFFSET, 0xf,
IORESOURCE_MEM_16BIT, &quad_uart_serial_plat);
#endif
return 0;
}
static int da923rc_console_init(void)
{
if (binfo.bid == BOARD_TYPE_DA923)
barebox_set_model("DA923RC");
else if (binfo.bid == BOARD_TYPE_GBX460)
barebox_set_model("GBX460");
else
barebox_set_model("unknown");
serial_plat.clock = fsl_get_bus_freq(0);
add_ns16550_device(1, CFG_CCSRBAR + 0x4600, 16,
IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
&serial_plat);
return 0;
}
static int eukrea_cpuimx27_console_init(void)
{
#ifdef CONFIG_DRIVER_SERIAL_IMX
imx_add_uart((void *)IMX_UART1_BASE, -1);
#endif
/* configure 8 bit UART on cs3 */
FMCR &= ~0x2;
CS3U = 0x0000D603;
CS3L = 0x0D1D0D01;
CS3A = 0x00D20000;
#ifdef CONFIG_DRIVER_SERIAL_NS16550
add_ns16550_device(-1, IMX_CS3_BASE + QUART_OFFSET, 0xf,
IORESOURCE_MEM_16BIT, &quad_uart_serial_plat);
#endif
return 0;
}
struct device_d *omap_add_uart(int id, unsigned long base)
{
return add_ns16550_device(id, base, 1024,
IORESOURCE_MEM_8BIT, &serial_plat);
}
static int openrisc_console_init(void)
{
/* Register the serial port */
add_ns16550_device(DEVICE_ID_DYNAMIC, OPENRISC_SOPC_UART_BASE, 1024, IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}