static void
apecs_swiz_writew(u_int32_t pa, u_int16_t data)
{
apecs_swiz_set_hae_mem(&pa);
SPARSE_WRITE_WORD(KV(APECS_PCI_SPARSE), pa, data);
alpha_wmb();
}
static void
apecs_swiz_cfgwritel(u_int b, u_int s, u_int f, u_int r, u_int32_t data)
{
struct apecs_softc* sc = APECS_SOFTC(apecs0);
vm_offset_t off = APECS_SWIZ_CFGOFF(b, s, f, r);
if (badaddr((caddr_t)(sc->cfg0_base + SPARSE_LONG_OFFSET(off)), 4)) return;
SPARSE_WRITE_LONG(sc->cfg0_base, off, data);
alpha_wmb();
}
inline void
jensenio_intio_barrier(void *v, bus_space_handle_t h, bus_size_t o,
bus_size_t l, int f)
{
if ((f & BUS_SPACE_BARRIER_READ) != 0)
alpha_mb();
else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
alpha_wmb();
}
static inline void
__C(CHIP,_mem_barrier)(
void *v,
bus_space_handle_t h,
bus_size_t o,
bus_size_t l,
int f)
{
if ((f & BUS_SPACE_BARRIER_READ) != 0)
alpha_mb();
else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
alpha_wmb();
}
static void
apecs_swiz_outl(u_int32_t port, u_int32_t data)
{
SPARSE_WRITE_LONG(KV(APECS_PCI_SIO), port, data);
alpha_wmb();
}
