static void __init dir825b1_wlan_init(void)
{
u8 *caldata;
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0);
if (!dir825b1_is_caldata_valid(caldata)) {
caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1);
if (!dir825b1_is_caldata_valid(caldata)) {
pr_err("no calibration data found\n");
return;
}
}
ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0);
ath79_init_mac(wmac0, mac0, 0);
ath79_init_mac(wmac1, mac1, 1);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0,
caldata + DIR825B1_CAL1_OFFSET, wmac1);
}
static void __init tew673gru_wlan_init(void)
{
u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
u8 *caldata;
caldata = (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0);
if (!tew673gru_is_caldata_valid(caldata)) {
caldata = (u8 *)KSEG1ADDR(TEW673GRU_CAL_LOCATION_1);
if (!tew673gru_is_caldata_valid(caldata)) {
pr_err("no calibration data found\n");
return;
}
}
ath79_parse_ascii_mac(caldata + TEW673GRU_MAC0_OFFSET, mac1);
ath79_parse_ascii_mac(caldata + TEW673GRU_MAC1_OFFSET, mac2);
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init(caldata + TEW673GRU_CAL0_OFFSET, mac1,
caldata + TEW673GRU_CAL1_OFFSET, mac2);
}
static void __init wndap360_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_mdio(0, ~(WNDAP360_LAN_PHYMASK));
/* Reusing wifi MAC with offset of 1 as eth0 MAC */
ath79_init_mac(ath79_eth0_data.mac_addr,
art + WNDAP360_WMAC0_MAC_OFFSET, 1);
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = WNDAP360_LAN_PHYMASK;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wndap360_leds_gpio),
wndap360_leds_gpio);
ath79_register_gpio_keys_polled(-1, WNDAP360_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wndap360_gpio_keys),
wndap360_gpio_keys);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init(art + WNDAP360_CALDATA0_OFFSET,
art + WNDAP360_WMAC0_MAC_OFFSET,
art + WNDAP360_CALDATA1_OFFSET,
art + WNDAP360_WMAC1_MAC_OFFSET);
}
static void __init tew673gru_setup(void)
{
u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
tew673gru_read_ascii_mac(mac1, TEW673GRU_MAC_LOCATION_0);
tew673gru_read_ascii_mac(mac2, TEW673GRU_MAC_LOCATION_1);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_eth1_pll_data.pll_1000 = 0x11110000;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio),
tew673gru_leds_gpio);
ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tew673gru_gpio_keys),
tew673gru_gpio_keys);
ath79_register_usb();
platform_device_register(&tew673gru_rtl8366s_device);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init((u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0), mac1,
(u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_1), mac2);
spi_register_board_info(tew673gru_spi_info,
ARRAY_SIZE(tew673gru_spi_info));
platform_device_register(&tew673gru_spi_device);
}
static void __init whrhpg300n_setup(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET);
ath79_register_m25p80(NULL);
ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio),
whrhpg300n_leds_gpio);
ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL,
ARRAY_SIZE(whrhpg300n_gpio_keys),
whrhpg300n_gpio_keys);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
ap9x_pci_setup_wmac_led_pin(0, 1);
ap91_pci_init(ee, mac);
}
static void __init wzrhpg450h_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1f051000);
u8 *mac = (u8 *) ee + 2;
ath79_register_m25p80_multi(&wzrhpg450h_flash_data);
ath79_register_mdio(0, ~BIT(0));
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio),
wzrhpg450h_leds_gpio);
ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wzrhpg450h_gpio_keys),
wzrhpg450h_gpio_keys);
ath79_register_eth(0);
gpio_request_one(16, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ap91_pci_init(ee, NULL);
ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true;
ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true;
ap9x_pci_setup_wmac_led_pin(0, 15);
ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio,
ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio));
}
static void __init dir825c1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
dir825c1_read_ascii_mac(mac1, mac + DIR825C1_MAC0_OFFSET);
dir825c1_read_ascii_mac(mac2, mac + DIR825C1_MAC1_OFFSET);
ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
dir825c1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825c1_gpio_keys),
dir825c1_gpio_keys);
ap9x_pci_setup_wmac_led_pin(0, 13);
ap9x_pci_setup_wmac_led_pin(1, 32);
ath79_init_mac(tmpmac, mac1, 0);
ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac, mac2, 0);
ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, tmpmac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(dir825c1_mdio0_info,
ARRAY_SIZE(dir825c1_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
ath79_register_usb();
}
static void __init tl_wr841n_v7_setup(void)
{
tl_ap99_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1,
tl_mr3x20_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, 0);
}
static void __init wzrhpag300h_setup(void)
{
u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000);
u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000);
u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET;
u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET;
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1);
ath79_register_mdio(0, ~(BIT(0) | BIT(4)));
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = BIT(4);
ath79_register_eth(0);
ath79_register_eth(1);
gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio),
wzrhpag300h_leds_gpio);
ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wzrhpag300h_gpio_keys),
wzrhpag300h_gpio_keys);
ath79_register_m25p80_multi(&wzrhpag300h_flash_data);
ap94_pci_init(eeprom1, mac1, eeprom2, mac2);
ap9x_pci_setup_wmac_led_pin(0, 1);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap9x_pci_setup_wmac_leds(0, wzrhpag300h_wmac0_leds_gpio,
ARRAY_SIZE(wzrhpag300h_wmac0_leds_gpio));
ap9x_pci_setup_wmac_leds(1, wzrhpag300h_wmac1_leds_gpio,
ARRAY_SIZE(wzrhpag300h_wmac1_leds_gpio));
}
static void __init common_setup(bool dualband)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
ath79_register_m25p80(&wdr3500_flash_data);
if (dualband)
{
tplink_register_builtin_wmac1(WDR3500_WMAC_CALDATA_OFFSET, mac, -1);
}
ap9x_pci_setup_wmac_led_pin(0, 0);
tplink_register_ap91_wmac2(WDR3500_PCIE_CALDATA_OFFSET, mac, 2);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
/* LAN */
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
/* WAN */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
/* GMAC0 is connected to the PHY4 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
if (dualband)
{
gpio_request_one(WDR3500_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
}
ath79_register_usb();
ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1,
AR934X_GPIO_OUT_LED_LINK3);
ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2,
AR934X_GPIO_OUT_LED_LINK2);
ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3,
AR934X_GPIO_OUT_LED_LINK1);
ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4,
AR934X_GPIO_OUT_LED_LINK0);
ath79_gpio_output_select(WDR3500_GPIO_LED_WAN,
AR934X_GPIO_OUT_LED_LINK4);
}
static void __init tl_mr3220_setup(void)
{
tl_ap99_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio),
tl_mr3x20_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, 1);
tl_mr3x20_usb_setup();
}
static void __init dir825b1_setup(void)
{
u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0);
dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_eth1_pll_data.pll_1000 = 0x11110000;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(&dir825b1_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
dir825b1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825b1_gpio_keys),
dir825b1_gpio_keys);
ath79_register_usb();
platform_device_register(&dir825b1_rtl8366s_device);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1,
(u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2);
}
static void __init common_setup(bool pcie_slot)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
ath79_register_m25p80(&archer_c7_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
tplink_register_builtin_wmac1(ARCHER_C7_WMAC_CALDATA_OFFSET, mac, -1);
if (pcie_slot) {
ath79_register_pci();
} else {
ap9x_pci_setup_wmac_led_pin(0, 0);
tplink_register_ap91_wmac2(ARCHER_C7_PCIE_CALDATA_OFFSET, mac, 2);
}
mdiobus_register_board_info(archer_c7_mdio0_info,
ARRAY_SIZE(archer_c7_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
gpio_request_one(ARCHER_C7_GPIO_USB1_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB1 power");
gpio_request_one(ARCHER_C7_GPIO_USB2_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB2 power");
ath79_register_usb();
}
static void __init dir825c1_setup(void)
{
ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
AR934X_GPIO_OUT_GPIO);
gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE,
GPIOF_OUT_INIT_LOW, "WAN LED enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
dir825c1_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, 0);
dir825c1_generic_setup();
}
static void __init wnr2000v3_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG to use all AR724X GPIO LEDs.
* Also disable CLKs and bit 20 as u-boot does.
* Finally, allow OS to control all link LEDs.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN |
BIT(20));
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v3_leds_gpio),
wnr2000v3_leds_gpio);
/* Do not use id=-1, we can have more GPIO key-polled devices */
ath79_register_gpio_keys_polled(PLATFORM_DEVID_AUTO,
WNR2000V3_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wnr2000v3_keys_gpio),
wnr2000v3_keys_gpio);
ap9x_pci_setup_wmac_led_pin(0, WNR2000V3_GPIO_WMAC_LED_WLAN_BLUE);
ap9x_pci_setup_wmac_led_name(0, wnr2000v3_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, wnr2000v3_wmac_leds_gpio,
ARRAY_SIZE(wnr2000v3_wmac_leds_gpio));
ap9x_pci_setup_wmac_btns(0, wnr2000v3_wmac_keys_gpio,
ARRAY_SIZE(wnr2000v3_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init wdr4300_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
ath79_register_m25p80(&wdr4300_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio),
wdr4300_leds_gpio);
ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wdr4300_gpio_keys),
wdr4300_gpio_keys);
ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0);
ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1);
ath79_init_mac(tmpmac, mac, -1);
ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac, mac, 0);
ap9x_pci_setup_wmac_led_pin(0, 0);
ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(wdr4300_mdio0_info,
ARRAY_SIZE(wdr4300_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
gpio_request_one(WDR4300_GPIO_USB1_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB1 power");
gpio_request_one(WDR4300_GPIO_USB2_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB2 power");
ath79_register_usb();
}
static void __init wnr612v2_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG and CLKs. Allow OS to control all link LEDs.
* Note: U-Boot for WNR612v2 sets undocumented bit 15 but
* we leave it for now.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr612v2_leds_gpio),
wnr612v2_leds_gpio);
/*
* This device has no buttons on AR7241 GPIO and no extra LEDs
* connected to AR9285 so setup is simpler than for WNR2000v3.
*/
ap9x_pci_setup_wmac_led_pin(0, WNR612V2_GPIO_WMAC_LED_WLAN_GREEN);
ap9x_pci_setup_wmac_led_name(0, wnr612v2_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, NULL, 0);
ap9x_pci_setup_wmac_btns(0, wnr612v2_wmac_keys_gpio,
ARRAY_SIZE(wnr612v2_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init wnr1000v2_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG and CLKs. Allow OS to control all link LEDs.
* Note: U-Boot for WNR1000v2 sets undocumented bit 15 but
* we leave it for now.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr1000v2_leds_gpio),
wnr1000v2_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, WNR1000V2_GPIO_WMAC_LED_WLAN_BLUE);
ap9x_pci_setup_wmac_led_name(0, wnr2000v3_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, wnr1000v2_wmac_leds_gpio,
ARRAY_SIZE(wnr1000v2_wmac_leds_gpio));
/* All 3 buttons are connected to wireless chip */
ap9x_pci_setup_wmac_btns(0, wnr1000v2_wmac_keys_gpio,
ARRAY_SIZE(wnr1000v2_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init rb751_wlan_setup(void)
{
u8 *hardconfig = (u8 *) KSEG1ADDR(RB751_HARDCONFIG);
struct ath9k_platform_data *wmac_data;
u16 tag_len;
u8 *tag;
u16 mac_len;
u8 *mac;
int err;
wmac_data = ap9x_pci_get_wmac_data(0);
if (!wmac_data) {
pr_err("rb75x: unable to get address of wlan data\n");
return;
}
ap9x_pci_setup_wmac_led_pin(0, 9);
err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE,
RB_ID_WLAN_DATA, &tag, &tag_len);
if (err) {
pr_err("rb75x: no calibration data found\n");
return;
}
err = rle_decode(tag, tag_len, (unsigned char *) wmac_data->eeprom_data,
sizeof(wmac_data->eeprom_data), NULL, NULL);
if (err) {
pr_err("rb75x: unable to decode wlan eeprom data\n");
return;
}
err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE,
RB_ID_MAC_ADDRESS_PACK, &mac, &mac_len);
if (err) {
pr_err("rb75x: no mac address found\n");
return;
}
ap91_pci_init(NULL, mac);
}
static void __init wpn824n_setup(void)
{
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN);
wnr_common_setup(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wpn824n_leds_gpio),
wpn824n_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, WPN824N_WGPIO_LED_WLAN_BLUE);
ap9x_pci_setup_wmac_led_name(0, wnr2000v3_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, wpn824n_wmac_leds_gpio,
ARRAY_SIZE(wpn824n_wmac_leds_gpio));
ap9x_pci_setup_wmac_btns(0, wpn824n_wmac_keys_gpio,
ARRAY_SIZE(wpn824n_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init wzrhpg300nh2_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000);
u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET;
/* There is an eth1 but it is not connected to the switch */
ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
ath79_register_mdio(0, ~(BIT(0)));
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
/* gpio13 is usb power. Turn it on. */
gpio_request_one(13, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio),
wzrhpg300nh2_leds_gpio);
ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wzrhpg300nh2_gpio_keys),
wzrhpg300nh2_gpio_keys);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio,
ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio));
ap91_pci_init(eeprom, mac0);
}
static void __init dir_615_e4_setup(void)
{
dir_600_a1_setup();
ap9x_pci_setup_wmac_led_pin(0, 1);
}
