int board_late_init(void) { #if defined(CONFIG_SYS_MMC_BOOT_DEV) char boot[16]; sprintf(boot, "mmc dev %d", CONFIG_SYS_MMC_BOOT_DEV); run_command(boot, 0); #endif #if defined(CONFIG_RECOVERY_BOOT) if (RECOVERY_SIGNATURE == readl(SCR_RESET_SIG_READ)) { writel((-1UL), SCR_RESET_SIG_RESET); /* clear */ printf("RECOVERY BOOT\n"); bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); run_command(CONFIG_CMD_RECOVERY_BOOT, 0); /* recovery boot */ } writel((-1UL), SCR_RESET_SIG_RESET); #endif /* CONFIG_RECOVERY_BOOT */ #if defined(CONFIG_BAT_CHECK) { int ret =0; int bat_check_skip = 0; // psw0523 for cts // bat_check_skip = 1; #if defined(CONFIG_DISPLAY_OUT) ret = power_battery_check(bat_check_skip, bd_display_run); #else ret = power_battery_check(bat_check_skip, NULL); #endif if(ret == 1) auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); } #else /* CONFIG_BAT_CHECK */ #if defined(CONFIG_DISPLAY_OUT) bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); #endif /* Temp check gpio to update */ auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); #endif /* CONFIG_BAT_CHECK */ return 0; }
int board_late_init(void) { #if defined(CONFIG_SYS_MMC_BOOT_DEV) char boot[16]; sprintf(boot, "mmc dev %d", CONFIG_SYS_MMC_BOOT_DEV); run_command(boot, 0); #endif #if defined CONFIG_RECOVERY_BOOT if (RECOVERY_SIGNATURE == readl(SCR_RESET_SIG_READ)) { writel((-1UL), SCR_RESET_SIG_RESET); /* clear */ printf("RECOVERY BOOT\n"); bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); run_command(CONFIG_CMD_RECOVERY_BOOT, 0); /* recovery boot */ } writel((-1UL), SCR_RESET_SIG_RESET); #endif /* CONFIG_RECOVERY_BOOT */ #if defined(CONFIG_BAT_CHECK) { int ret =0; int bat_check_skip = 0; // psw0523 for cts // bat_check_skip = 1; #if defined(CONFIG_DISPLAY_OUT) ret = power_battery_check(bat_check_skip, bd_display_run); #else ret = power_battery_check(bat_check_skip, NULL); #endif if(ret == 1) auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); } #else /* CONFIG_BAT_CHECK */ // mipi reset NX_TIEOFF_Set(TIEOFFINDEX_OF_MIPI0_NX_DPSRAM_1R1W_EMAA, 3); NX_TIEOFF_Set(TIEOFFINDEX_OF_MIPI0_NX_DPSRAM_1R1W_EMAB, 3); NX_RSTCON_SetnRST(RESET_ID_MIPI, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_DSI, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_CSI, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_PHY_S, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_PHY_M, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI, RSTCON_nENABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_DSI, RSTCON_nENABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_PHY_S, RSTCON_nENABLE); NX_RSTCON_SetnRST(RESET_ID_MIPI_PHY_M, RSTCON_nENABLE); // ac97 reset NX_RSTCON_SetnRST(RESET_ID_AC97, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_AC97, RSTCON_nENABLE); // scaler reset NX_RSTCON_SetnRST(RESET_ID_SCALER, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_SCALER, RSTCON_nENABLE); // pdm reset NX_CLKGEN_SetClockPClkMode(CLOCKINDEX_OF_PDM_MODULE, NX_PCLKMODE_ALWAYS); // PCLK Always NX_RSTCON_SetnRST(RESET_ID_PDM, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_PDM, RSTCON_nENABLE); // mpegtsi reset NX_RSTCON_SetnRST(RESET_ID_MPEGTSI, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_MPEGTSI, RSTCON_nENABLE); // crypto reset NX_CLKGEN_SetClockPClkMode(CLOCKINDEX_OF_CRYPTO_MODULE, NX_PCLKMODE_ALWAYS); // PCLK Always NX_RSTCON_SetnRST(RESET_ID_CRYPTO, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_CRYPTO, RSTCON_nENABLE); // spi1 reset NX_RSTCON_SetnRST(RESET_ID_SSP1_P, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_SSP1, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_SSP1_P, RSTCON_nENABLE); NX_RSTCON_SetnRST(RESET_ID_SSP1, RSTCON_nENABLE); // spi2 reset NX_RSTCON_SetnRST(RESET_ID_SSP2_P, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_SSP2, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_SSP2_P, RSTCON_nENABLE); NX_RSTCON_SetnRST(RESET_ID_SSP2, RSTCON_nENABLE); // vip 0/1 reset NX_CLKGEN_SetClockBClkMode(CLOCKINDEX_OF_VIP0_MODULE, NX_BCLKMODE_DYNAMIC); NX_CLKGEN_SetClockDivisorEnable(CLOCKINDEX_OF_VIP0_MODULE, CTRUE); NX_RSTCON_SetnRST(RESET_ID_VIP0, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_VIP0, RSTCON_nENABLE); NX_CLKGEN_SetClockBClkMode(CLOCKINDEX_OF_VIP1_MODULE, NX_BCLKMODE_DYNAMIC); NX_CLKGEN_SetClockDivisorEnable(CLOCKINDEX_OF_VIP1_MODULE, CTRUE); NX_RSTCON_SetnRST(RESET_ID_VIP1, RSTCON_nDISABLE); NX_RSTCON_SetnRST(RESET_ID_VIP1, RSTCON_nENABLE); #if defined(CONFIG_DISPLAY_OUT) bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); #endif #ifdef CONFIG_CMD_NET bd_eth_init(); #endif /* Temp check gpio to update */ auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); #endif /* CONFIG_BAT_CHECK */ return 0; }
int board_late_init(void) { #if defined(CONFIG_SYS_MMC_BOOT_DEV) char boot[16]; sprintf(boot, "mmc dev %d", board_mmc_bootdev()); run_command(boot, 0); #endif if (board_mmc_bootdev() == 0 && !getenv("firstboot")) { #ifdef CONFIG_LOADCMD_CH0 setenv("bloader", CONFIG_LOADCMD_CH0); #endif #ifdef CONFIG_BOOTCMD_CH0 setenv("bootcmd", CONFIG_BOOTCMD_CH0); #endif setenv("firstboot", "0"); saveenv(); } bd_update_env(); #if defined(CONFIG_RECOVERY_BOOT) if (RECOVERY_SIGNATURE == readl(SCR_RESET_SIG_READ)) { writel((-1UL), SCR_RESET_SIG_RESET); /* clear */ printf("RECOVERY BOOT\n"); bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); run_command(CONFIG_CMD_RECOVERY_BOOT, 0); /* recovery boot */ } writel((-1UL), SCR_RESET_SIG_RESET); #endif /* CONFIG_RECOVERY_BOOT */ #if defined(CONFIG_BAT_CHECK) { int ret = 0; int bat_check_skip = 0; // psw0523 for cts // bat_check_skip = 1; #if defined(CONFIG_DISPLAY_OUT) ret = power_battery_check(bat_check_skip, bd_display_run); #else ret = power_battery_check(bat_check_skip, NULL); #endif if (ret == 1) auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); } #else /* CONFIG_BAT_CHECK */ #if defined(CONFIG_DISPLAY_OUT) bd_display_run(CONFIG_CMD_LOGO_WALLPAPERS, CFG_LCD_PRI_PWM_DUTYCYCLE, 1); #endif onewire_set_backlight(127); /* Temp check gpio to update */ if (!getenv("autoupdate")) auto_update(UPDATE_KEY, UPDATE_CHECK_TIME); #endif /* CONFIG_BAT_CHECK */ return 0; }