void emmc_4_4_uboot_copy(void) { MSH_ReadFromFIFO_eMMC bl2_copy = (MSH_ReadFromFIFO_eMMC) (*(u32 *) (MSH_ReadFromFIFO_eMMC_ADDRESS)); #if defined (CONFIG_EXYNOS4212) || defined (CONFIG_ARCH_EXYNOS5) bl2_copy(MOVI_UBOOT_BLKCNT, CONFIG_PHY_UBOOT_BASE); #ifdef CONFIG_CORTEXA5_ENABLE uboot_memcpy(0x40000000, CONFIG_PHY_UBOOT_BASE, PART_SIZE_UBOOT); #endif #else bl2_copy(0x10, MOVI_UBOOT_BLKCNT, CONFIG_PHY_UBOOT_BASE); #endif #ifdef CONFIG_SECURE_BOOT if (Check_Signature((SB20_CONTEXT *)SECURE_CONTEXT_BASE, (unsigned char*)CONFIG_PHY_UBOOT_BASE, PART_SIZE_UBOOT-256, (unsigned char*)(CONFIG_PHY_UBOOT_BASE+PART_SIZE_UBOOT-256), 256) != 0) { while(1); } #endif }
void emmc_4_4_uboot_copy(void) { MSH_ReadFromFIFO_eMMC bl2_copy = (MSH_ReadFromFIFO_eMMC) (*(u32 *) (MSH_ReadFromFIFO_eMMC_ADDRESS)); #if defined (CONFIG_EXYNOS4212) || defined (CONFIG_ARCH_EXYNOS5) bl2_copy(MOVI_UBOOT_BLKCNT, CONFIG_PHY_UBOOT_BASE); #ifdef CONFIG_CORTEXA5_ENABLE uboot_memcpy(0x40000000, CONFIG_PHY_UBOOT_BASE, PART_SIZE_UBOOT); #endif #else bl2_copy(0x10, MOVI_UBOOT_BLKCNT, CONFIG_PHY_UBOOT_BASE); #endif }
void emmc_4_4_endbootOp_eMMC(void) { MSH_EndBootOp_eMMC bl2_copy = (MSH_EndBootOp_eMMC) (*(u32 *) (MSH_EndBootOp_eMMC_ADDRESS)); bl2_copy(); }