/* * int cardbus_mapreg_unmap(struct cardbus_softc *sc, int func, int reg, * bus_space_tag_t tag, bus_space_handle_t handle, * bus_size_t size) * * This function releases bus-space region and close memory or io * window on the bridge. * * Arguments: * struct cardbus_softc *sc; the pointer to the device structure of cardbus. * int func; the number of function on the device. * int reg; the offset of BAR register. */ int cardbus_mapreg_unmap(struct cardbus_softc *sc, int func, int reg, bus_space_tag_t tag, bus_space_handle_t handle, bus_size_t size) { cardbus_chipset_tag_t cc = sc->sc_cc; cardbus_function_tag_t cf = sc->sc_cf; int st = 1; pcitag_t cardbustag; rbus_tag_t rbustag; if (sc->sc_iot == tag) { /* bus space is io space */ DPRINTF(("%s: unmap i/o space\n", device_xname(sc->sc_dev))); rbustag = sc->sc_rbus_iot; } else if (sc->sc_memt == tag) { /* bus space is memory space */ DPRINTF(("%s: unmap mem space\n", device_xname(sc->sc_dev))); rbustag = sc->sc_rbus_memt; } else { return 1; } cardbustag = cardbus_make_tag(cc, cf, sc->sc_bus, func); cardbus_conf_write(cc, cf, cardbustag, reg, 0); (*cf->cardbus_space_free)(cc, rbustag, handle, size); return st; }
static void fxp_cardbus_setup(struct fxp_softc * sc) { struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *)sc; struct cardbus_softc *psc = device_private(device_parent(sc->sc_dev)); cardbus_chipset_tag_t cc = psc->sc_cc; cardbus_function_tag_t cf = psc->sc_cf; pcireg_t command; cardbustag_t tag = cardbus_make_tag(cc, cf, csc->ct->ct_bus, csc->ct->ct_func); command = Cardbus_conf_read(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG); if (csc->base0_reg) { Cardbus_conf_write(csc->ct, tag, CARDBUS_BASE0_REG, csc->base0_reg); (cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE); command |= CARDBUS_COMMAND_MEM_ENABLE | CARDBUS_COMMAND_MASTER_ENABLE; } else if (csc->base1_reg) { Cardbus_conf_write(csc->ct, tag, CARDBUS_BASE1_REG, csc->base1_reg); (cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE); command |= (CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MASTER_ENABLE); } (cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE); /* enable the card */ Cardbus_conf_write(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG, command); }
/* * int cardbus_mapreg_map(struct cardbus_softc *, int, int, pcireg_t, * int bus_space_tag_t *, bus_space_handle_t *, * bus_addr_t *, bus_size_t *) * This function maps bus-space on the value of Base Address * Register (BAR) indexed by the argument `reg' (the second argument). * When the value of the BAR is not valid, such as 0x00000000, a new * address should be allocated for the BAR and new address values is * written on the BAR. */ int cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg, pcireg_t type, int busflags, bus_space_tag_t *tagp, bus_space_handle_t *handlep, bus_addr_t *basep, bus_size_t *sizep) { cardbus_chipset_tag_t cc = sc->sc_cc; cardbus_function_tag_t cf = sc->sc_cf; bus_space_tag_t bustag; rbus_tag_t rbustag; bus_space_handle_t handle; bus_addr_t base; bus_size_t size; int flags; int status = 0; pcitag_t tag; size = 0; /* XXX gcc */ flags = 0; /* XXX gcc */ tag = cardbus_make_tag(cc, cf, sc->sc_bus, func); DPRINTF(("cardbus_mapreg_map called: %s %x\n", device_xname(sc->sc_dev), type)); if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) { if (cardbus_io_find(cc, cf, tag, reg, type, &base, &size, &flags)) { status = 1; } bustag = sc->sc_iot; rbustag = sc->sc_rbus_iot; } else { if (cardbus_mem_find(cc, cf, tag, reg, type, &base, &size, &flags)){ status = 1; } bustag = sc->sc_memt; rbustag = sc->sc_rbus_memt; } if (status == 0) { bus_addr_t mask = size - 1; if (base != 0) { mask = 0xffffffff; } if ((*cf->cardbus_space_alloc)(cc, rbustag, base, size, mask, size, busflags | flags, &base, &handle)) { panic("io alloc"); } } cardbus_conf_write(cc, cf, tag, reg, base); DPRINTF(("cardbus_mapreg_map: physaddr %lx\n", (unsigned long)base)); if (tagp != 0) { *tagp = bustag; } if (handlep != 0) { *handlep = handle; } if (basep != 0) { *basep = base; } if (sizep != 0) { *sizep = size; } return 0; }