static void queues2_execute(void) {
unsigned i;
size_t n;
/* Initial empty state */
test_assert_lock(1, chOQIsEmptyI(&oq), "not empty");
/* Queue filling */
for (i = 0; i < TEST_QUEUES_SIZE; i++)
chOQPut(&oq, 'A' + i);
test_assert_lock(2, chOQIsFullI(&oq), "still has space");
/* Queue emptying */
for (i = 0; i < TEST_QUEUES_SIZE; i++) {
char c;
chSysLock();
c = chOQGetI(&oq);
chSysUnlock();
test_emit_token(c);
}
test_assert_lock(3, chOQIsEmptyI(&oq), "still full");
test_assert_sequence(4, "ABCD");
test_assert_lock(5, chOQGetI(&oq) == Q_EMPTY, "failed to report Q_EMPTY");
/* Writing the whole thing */
n = chOQWriteTimeout(&oq, wa[1], TEST_QUEUES_SIZE * 2, TIME_IMMEDIATE);
test_assert(6, n == TEST_QUEUES_SIZE, "wrong returned size");
test_assert_lock(7, chOQIsFullI(&oq), "not full");
threads[0] = chThdCreateStatic(wa[0], WA_SIZE, chThdGetPriorityX()+1, thread2, NULL);
test_assert_lock(8, chOQGetFullI(&oq) == TEST_QUEUES_SIZE, "not empty");
test_wait_threads();
/* Testing reset */
chSysLock();
chOQResetI(&oq);
chSysUnlock();
test_assert_lock(9, chOQGetFullI(&oq) == 0, "still full");
/* Partial writes */
n = chOQWriteTimeout(&oq, wa[1], TEST_QUEUES_SIZE / 2, TIME_IMMEDIATE);
test_assert(10, n == TEST_QUEUES_SIZE / 2, "wrong returned size");
n = chOQWriteTimeout(&oq, wa[1], TEST_QUEUES_SIZE / 2, TIME_IMMEDIATE);
test_assert(11, n == TEST_QUEUES_SIZE / 2, "wrong returned size");
test_assert_lock(12, chOQIsFullI(&oq), "not full");
/* Timeout */
test_assert(13, chOQPutTimeout(&oq, 0, 10) == Q_TIMEOUT, "wrong timeout return");
}
/**
* @brief Common IRQ handler.
*
* @param[in] sdp pointer to a @p SerialDriver object
*/
static void serve_interrupt(SerialDriver *sdp) {
volatile struct ESCI_tag *escip = sdp->escip;
uint32_t sr = escip->SR.R;
escip->SR.R = 0x3FFFFFFF; /* Does not clear TDRE | TC.*/
if (sr & 0x0F000000) /* OR | NF | FE | PF. */
set_error(sdp, sr);
if (sr & 0x20000000) { /* RDRF. */
chSysLockFromIsr();
sdIncomingDataI(sdp, escip->DR.B.D);
chSysUnlockFromIsr();
}
if (escip->CR1.B.TIE && (sr & 0x80000000)) { /* TDRE. */
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
escip->CR1.B.TIE = 0;
}
else {
ESCI_A.SR.B.TDRE = 1;
escip->DR.R = (uint16_t)b;
}
chSysUnlockFromIsr();
}
}
/**
* @brief Common IRQ handler.
* @note Tries hard to clear all the pending interrupt sources, we don't
* want to go through the whole ISR and have another interrupt soon
* after.
*
* @param[in] u pointer to an UART I/O block
* @param[in] sdp communication channel associated to the UART
*/
static void serve_interrupt(SerialDriver *sdp) {
UART_TypeDef *u = sdp->uart;
uint8_t s1 = u->S1;
if (s1 & UARTx_S1_RDRF) {
osalSysLockFromISR();
if (chIQIsEmptyI(&sdp->iqueue))
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
if (chIQPutI(&sdp->iqueue, u->D) < Q_OK)
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
osalSysUnlockFromISR();
}
if (s1 & UARTx_S1_TDRE) {
msg_t b;
osalSysLockFromISR();
b = chOQGetI(&sdp->oqueue);
osalSysUnlockFromISR();
if (b < Q_OK) {
osalSysLockFromISR();
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
osalSysUnlockFromISR();
u->C2 &= ~UARTx_C2_TIE;
} else {
u->D = b;
}
}
}
/**
* @brief Handles outgoing data.
* @details Must be called from the output interrupt service routine in order
* to get the next byte to be transmitted.
* @note In order to gain some performance it is suggested to not use
* this function directly but copy this code directly into the
* interrupt service routine.
*
* @param[in] sdp pointer to a @p SerialDriver structure
* @return The byte value read from the driver's output queue.
* @retval Q_EMPTY if the queue is empty (the lower driver usually
* disables the interrupt source when this happens).
*
* @iclass
*/
msg_t sdRequestDataI(SerialDriver *sdp) {
msg_t b;
chDbgCheckClassI();
chDbgCheck(sdp != NULL, "sdRequestDataI");
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK)
chIOAddFlagsI(sdp, IO_OUTPUT_EMPTY);
return b;
}
/**
* @brief Common TXI IRQ handler.
*
* @param[in] sdp pointer to a @p SerialDriver object
*/
static void spc5xx_serve_txi_interrupt(SerialDriver *sdp) {
msg_t b;
sdp->linflexp->UARTSR.R = SPC5_UARTSR_DTF;
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
sdp->linflexp->UARTCR.B.TXEN = 0;
}
else
sdp->linflexp->BDRL.B.DATA0 = b;
}
/**
* @brief Attempts a TX preload.
*/
static void preload(SerialDriver *sdp) {
LPC_USART_TypeDef *u = sdp->uart;
if (u->STAT & STAT_TXIDLE) {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
return;
}
u->TXDATA = b;
}
u->INTENSET = STAT_TXRDY;
}
/**
* @brief Attempts a TX preload
*/
static void preload(SerialDriver *sdp) {
UART_TypeDef *u = sdp->uart;
if (u->S1 & UARTx_S1_TDRE) {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
return;
}
u->D = b;
u->C2 |= UARTx_C2_TIE;
}
}
static uint8_t fetcher(void *outQ)
/*
return next byte in queue
block if empty
*/
{
OutputQueue *q = outQ;
msg_t b;
chSysLock();
while((b = chOQGetI(q)) == Q_EMPTY)
chSchGoSleepS(THD_STATE_WTQUEUE);
chSysUnlock();
return b;
}
/**
* @brief Common IRQ handler.
* @note Tries hard to clear all the pending interrupt sources, we dont want
* to go through the whole ISR and have another interrupt soon after.
*
* @param[in] sdp communication channel associated to the UART
*/
static void serve_interrupt(SerialDriver *sdp) {
UART *u = sdp->uart;
while (TRUE) {
switch (u->UART_IIR & IIR_SRC_MASK) {
case IIR_SRC_NONE:
return;
case IIR_SRC_ERROR:
set_error(sdp, u->UART_LSR);
break;
case IIR_SRC_TIMEOUT:
case IIR_SRC_RX:
chSysLockFromIsr();
if (chIQIsEmptyI(&sdp->iqueue))
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
chSysUnlockFromIsr();
while (u->UART_LSR & LSR_RBR_FULL) {
chSysLockFromIsr();
if (chIQPutI(&sdp->iqueue, u->UART_RBR) < Q_OK)
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
chSysUnlockFromIsr();
}
break;
case IIR_SRC_TX:
{
int i = LPC214x_UART_FIFO_PRELOAD;
do {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
chSysUnlockFromIsr();
if (b < Q_OK) {
u->UART_IER &= ~IER_THRE;
chSysLockFromIsr();
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
chSysUnlockFromIsr();
break;
}
u->UART_THR = b;
} while (--i);
}
break;
default:
(void) u->UART_THR;
(void) u->UART_RBR;
}
}
}
/**
* @brief Common IRQ handler.
* @note Tries hard to clear all the pending interrupt sources, we don't
* want to go through the whole ISR and have another interrupt soon
* after.
*
* @param[in] u pointer to an UART I/O block
* @param[in] sdp communication channel associated to the UART
*/
static void serve_interrupt(SerialDriver *sdp) {
LPC_UART_TypeDef *u = sdp->uart;
while (TRUE) {
switch (u->IIR & IIR_SRC_MASK) {
case IIR_SRC_NONE:
return;
case IIR_SRC_ERROR:
set_error(sdp, u->LSR);
break;
case IIR_SRC_TIMEOUT:
case IIR_SRC_RX:
chSysLockFromIsr();
if (chIQIsEmpty(&sdp->iqueue))
chEvtBroadcastI(&sdp->ievent);
chSysUnlockFromIsr();
while (u->LSR & LSR_RBR_FULL) {
chSysLockFromIsr();
if (chIQPutI(&sdp->iqueue, u->RBR) < Q_OK)
sdAddFlagsI(sdp, SD_OVERRUN_ERROR);
chSysUnlockFromIsr();
}
break;
case IIR_SRC_TX:
{
int i = LPC13xx_UART_FIFO_PRELOAD;
do {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
chSysUnlockFromIsr();
if (b < Q_OK) {
u->IER &= ~IER_THRE;
chSysLockFromIsr();
chEvtBroadcastI(&sdp->oevent);
chSysUnlockFromIsr();
break;
}
u->THR = b;
} while (--i);
}
break;
default:
(void) u->THR;
(void) u->RBR;
}
}
}
/**
* @brief Attempts a TX FIFO preload.
*/
static void preload(SerialDriver *sdp) {
UART *u = sdp->uart;
if (u->UART_LSR & LSR_THRE) {
int i = LPC214x_UART_FIFO_PRELOAD;
do {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chEvtBroadcastI(&sdp->oevent);
return;
}
u->UART_THR = b;
} while (--i);
}
u->UART_IER |= IER_THRE;
}
/**
* @brief Attempts a TX FIFO preload.
*/
static void preload(SerialDriver *sdp) {
UART *u = sdp->uart;
if (u->UART_LSR & LSR_THRE) {
int i = LPC214x_UART_FIFO_PRELOAD;
do {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
return;
}
u->UART_THR = b;
} while (--i);
}
u->UART_IER |= IER_THRE;
}
/**
* @brief Attempts a TX FIFO preload.
*/
static void preload(SerialDriver *sdp) {
LPC_UART_TypeDef *u = sdp->uart;
if (u->LSR & LSR_THRE) {
int i = LPC13xx_SERIAL_FIFO_PRELOAD;
do {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chIOAddFlagsI(sdp, IO_OUTPUT_EMPTY);
return;
}
u->THR = b;
} while (--i);
}
u->IER |= IER_THRE;
}
/**
* @brief Common IRQ handler.
*
* @param[in] sdp communication channel associated to the USART
*/
static void serve_interrupt(SerialDriver *sdp) {
USART_TypeDef *u = sdp->usart;
uint32_t cr1 = u->CR1;
uint32_t isr;
/* Reading and clearing status.*/
isr = u->ISR;
u->ICR = isr;
/* Error condition detection.*/
if (isr & (USART_ISR_ORE | USART_ISR_NE | USART_ISR_FE | USART_ISR_PE))
set_error(sdp, isr);
/* Special case, LIN break detection.*/
if (isr & USART_ISR_LBD) {
chSysLockFromIsr();
chnAddFlagsI(sdp, SD_BREAK_DETECTED);
chSysUnlockFromIsr();
}
/* Data available.*/
if (isr & USART_ISR_RXNE) {
chSysLockFromIsr();
sdIncomingDataI(sdp, (uint8_t)u->RDR);
chSysUnlockFromIsr();
}
/* Transmission buffer empty.*/
if ((cr1 & USART_CR1_TXEIE) && (isr & USART_ISR_TXE)) {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
u->CR1 = (cr1 & ~USART_CR1_TXEIE) | USART_CR1_TCIE;
}
else
u->TDR = b;
chSysUnlockFromIsr();
}
/* Physical transmission end.*/
if (isr & USART_ISR_TC) {
chSysLockFromIsr();
chnAddFlagsI(sdp, CHN_TRANSMISSION_END);
chSysUnlockFromIsr();
u->CR1 = cr1 & ~USART_CR1_TCIE;
}
}
/**
* @brief Common IRQ handler.
*
* @param[in] sdp communication channel associated to the USART
*/
static void serve_interrupt(SerialDriver *sdp) {
USART_TypeDef *u = sdp->usart;
uint16_t cr1 = u->CR1;
uint16_t sr = u->SR; /* SR reset step 1.*/
uint16_t dr = u->DR; /* SR reset step 2.*/
/* Error condition detection.*/
if (sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE))
set_error(sdp, sr);
/* Special case, LIN break detection.*/
if (sr & USART_SR_LBD) {
chSysLockFromIsr();
chnAddFlagsI(sdp, SD_BREAK_DETECTED);
chSysUnlockFromIsr();
u->SR &= ~USART_SR_LBD;
}
/* Data available.*/
if (sr & USART_SR_RXNE) {
chSysLockFromIsr();
sdIncomingDataI(sdp, (uint8_t)dr);
chSysUnlockFromIsr();
}
/* Transmission buffer empty.*/
if ((cr1 & USART_CR1_TXEIE) && (sr & USART_SR_TXE)) {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
u->CR1 = (cr1 & ~USART_CR1_TXEIE) | USART_CR1_TCIE;
}
else
u->DR = b;
chSysUnlockFromIsr();
}
/* Physical transmission end.*/
if (sr & USART_SR_TC) {
chSysLockFromIsr();
chnAddFlagsI(sdp, CHN_TRANSMISSION_END);
chSysUnlockFromIsr();
u->CR1 = cr1 & ~USART_CR1_TCIE;
u->SR &= ~USART_SR_TC;
}
}
/**
* @brief Common IRQ handler.
* @note Tries hard to clear all the pending interrupt sources, we don't
* want to go through the whole ISR and have another interrupt soon
* after.
*
* @param[in] u pointer to an UART I/O block
* @param[in] sdp communication channel associated to the UART
*/
static void serve_interrupt(SerialDriver *sdp) {
LPC_USART_TypeDef *u = sdp->uart;
while (u->INTSTAT) {
if (u->INTSTAT & STAT_RXRDY) {
chSysLockFromIsr();
if (chIQIsEmptyI(&sdp->iqueue))
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
if (chIQPutI(&sdp->iqueue, u->RXDATA) < Q_OK)
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
chSysUnlockFromIsr();
}
if (u->INTSTAT & STAT_TXRDY) {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
chSysUnlockFromIsr();
if (b < Q_OK) {
u->INTENCLR = STAT_TXRDY;
chSysLockFromIsr();
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
chSysUnlockFromIsr();
break;
}
else {
u->TXDATA = b;
}
}
if (u->INTSTAT & (STAT_OVERRUN | STAT_DELTARXBRK |
STAT_FRAMERR | STAT_PARITYERR) ) {
IOREG32 stat = u->STAT;
set_error(sdp, stat);
u->STAT = stat;
}
}
}
static void notify1(io_queue_t *qp)
{
SerialDriver *sdp = &SD1;
(void)qp;
if (NRF_UART0->PSELTXD == NRF51_SERIAL_PAD_DISCONNECTED)
return;
if (!sdp->tx_busy) {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
NRF_UART0->TASKS_STOPTX = 1;
return;
}
sdp->tx_busy = 1;
NRF_UART0->TASKS_STARTTX = 1;
NRF_UART0->TXD = b;
}
}
static
#endif
/**
* @brief Common IRQ handler.
*
* @param[in] sdp communication channel associated to the USART
*/
void sd_lld_serve_interrupt(SerialDriver *sdp) {
uint32_t csr;
AT91PS_USART u = sdp->usart;
csr = u->US_CSR;
if (csr & AT91C_US_RXRDY) {
chSysLockFromIsr();
sdIncomingDataI(sdp, u->US_RHR);
chSysUnlockFromIsr();
}
if ((u->US_IMR & AT91C_US_TXRDY) && (csr & AT91C_US_TXRDY)) {
msg_t b;
chSysLockFromIsr();
b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
chIOAddFlagsI(sdp, IO_OUTPUT_EMPTY);
u->US_IDR = AT91C_US_TXRDY;
}
else
u->US_THR = b;
chSysUnlockFromIsr();
}
csr &= (AT91C_US_OVRE | AT91C_US_FRAME | AT91C_US_PARE | AT91C_US_RXBRK);
if (csr != 0) {
set_error(sdp, csr);
u->US_CR = AT91C_US_RSTSTA;
}
AT91C_BASE_AIC->AIC_EOICR = 0;
}
msg_t OutQueue::getI(void) {
return chOQGetI(&oq);
}
