//===== RETI
void sngRETI()
{
_u16 temp = pop16();
pc = pop32();
sr = temp; changedSP();
cycles = 12;
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(z80_runtime),
SFARRAY(CPUExRAM, 16384),
SFVAR(FlashStatusEnable),
SFEND
};
SFORMAT TLCS_StateRegs[] =
{
SFVARN(pc, "PC"),
SFVARN(sr, "SR"),
SFVARN(f_dash, "F_DASH"),
SFARRAY32N(gpr, 4, "GPR"),
SFARRAY32N(gprBank[0], 4, "GPRB0"),
SFARRAY32N(gprBank[1], 4, "GPRB1"),
SFARRAY32N(gprBank[2], 4, "GPRB2"),
SFARRAY32N(gprBank[3], 4, "GPRB3"),
SFEND
};
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN"))
return(0);
if(!MDFNSS_StateAction(sm, load, data_only, TLCS_StateRegs, "TLCS"))
return(0);
if(!MDFNNGPCDMA_StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCSOUND_StateAction(sm, load, data_only))
return(0);
if(!NGPGfx->StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCZ80_StateAction(sm, load, data_only))
return(0);
if(!int_timer_StateAction(sm, load, data_only))
return(0);
if(!BIOSHLE_StateAction(sm, load, data_only))
return(0);
if(!FLASH_StateAction(sm, load, data_only))
return(0);
if(load)
{
RecacheFRM();
changedSP();
}
return(1);
}
static void StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(z80_runtime),
SFARRAY(CPUExRAM, 16384),
SFVAR(FlashStatusEnable),
SFEND
};
SFORMAT TLCS_StateRegs[] =
{
SFVARN(pc, "PC"),
SFVARN(sr, "SR"),
SFVARN(f_dash, "F_DASH"),
SFARRAY32N(gpr, 4, "GPR"),
SFARRAY32N(gprBank[0], 4, "GPRB0"),
SFARRAY32N(gprBank[1], 4, "GPRB1"),
SFARRAY32N(gprBank[2], 4, "GPRB2"),
SFARRAY32N(gprBank[3], 4, "GPRB3"),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
MDFNSS_StateAction(sm, load, data_only, TLCS_StateRegs, "TLCS");
MDFNNGPCDMA_StateAction(sm, load, data_only);
MDFNNGPCSOUND_StateAction(sm, load, data_only);
NGPGfx->StateAction(sm, load, data_only);
MDFNNGPCZ80_StateAction(sm, load, data_only);
int_timer_StateAction(sm, load, data_only);
BIOSHLE_StateAction(sm, load, data_only);
FLASH_StateAction(sm, load, data_only);
if(load)
{
RecacheFRM();
changedSP();
}
}
void setStatusRFP(uint8 rfp)
{
sr = (sr & 0xF8FF) | ((rfp & 0x3) << 8);
changedSP();
}
static void read_state_0050(char* filename)
{
NEOPOPSTATE0050 state;
int i,j;
if (system_io_state_read(filename, (_u8*)&state, sizeof(NEOPOPSTATE0050)))
{
//Verify correct rom...
if (memcmp(rom_header, &state.header, sizeof(RomHeader)) != 0)
{
system_message(system_get_string(IDS_WRONGROM));
return;
}
//Apply state description
reset();
eepromStatusEnable = state.eepromStatusEnable;
//TLCS-900h Registers
pc = state.pc;
sr = state.sr;
changedSP();
f_dash = state.f_dash;
eepromStatusEnable = state.eepromStatusEnable;
for (i = 0; i < 4; i++)
{
gpr[i] = state.gpr[i];
for (j = 0; j < 4; j++)
gprBank[i][j] = state.gprBank[i][j];
}
//Timers
timer_hint = state.timer_hint;
for (i = 0; i < 4; i++) //Up-counters
timer[i] = state.timer[i];
timer_clock0 = state.timer_clock0;
timer_clock1 = state.timer_clock1;
timer_clock2 = state.timer_clock2;
timer_clock3 = state.timer_clock3;
//Z80 Registers
memcpy(&Z80_regs, &state.Z80_regs, sizeof(Z80));
//Sound Chips
memcpy(&toneChip, &state.toneChip, sizeof(SoundChip));
memcpy(&noiseChip, &state.noiseChip, sizeof(SoundChip));
//DMA
for (i = 0; i < 4; i++)
{
dmaS[i] = state.dmaS[i];
dmaD[i] = state.dmaD[i];
dmaC[i] = state.dmaC[i];
dmaM[i] = state.dmaM[i];
}
//Memory
memcpy(ram, &state.ram, 0xC000);
}
}
//===== POP SR
void sngPOPSR()
{
sr = pop16(); changedSP();
cycles = 6;
}
