static void _cmdq_insert_wait_frame_done_token(void)
{
	if(ext_disp_is_video_mode())
	{
		cmdqRecWaitNoClear(pgc->cmdq_handle_config, dpmgr_path_get_mutex(pgc->dpmgr_handle) + CMDQ_EVENT_MUTEX0_STREAM_EOF);  ///CMDQ_EVENT_MUTEX1_STREAM_EOF  dpmgr_path_get_mutex()
	}
	else
	{
		cmdqRecWaitNoClear(pgc->cmdq_handle_config, CMDQ_SYNC_TOKEN_STREAM_EOF);
	}
	
	///dprec_event_op(DPREC_EVENT_CMDQ_WAIT_STREAM_EOF);
}
Пример #2
0
int ddp_insert_config_allow_rec(void *handle)
{
	int ret = 0;

	if(handle == NULL)
	{
		ASSERT(0);
	}

	if(primary_display_is_video_mode())
	{
		ret = cmdqRecWaitNoClear(handle, CMDQ_EVENT_MUTEX0_STREAM_EOF);
	}
	else
	{
		ret = cmdqRecWaitNoClear(handle, CMDQ_SYNC_TOKEN_STREAM_EOF);
	}

	return ret;
}
Пример #3
0
unsigned int disp_set_pll_by_cmdq(unsigned int freq, void *cmdq_handle)
{
	unsigned long reg_va_con0 = 0;
	unsigned long reg_va_con1 = 0;
	static unsigned int freq_last = 364;
	static unsigned int pll_cnt;
	unsigned int i = 0;

	if (freq == freq_last)
		/* return; */

	freq_last = freq;

	reg_va_con0 =
	    (unsigned long)ioremap_nocache(REG_PA_VENC_PLL_CON0,
					   sizeof(unsigned long));
	reg_va_con1 =
	    (unsigned long)ioremap_nocache(REG_PA_VENC_PLL_CON1,
					   sizeof(unsigned long));

	pr_debug
	    ("disp_set_pll(%d), before set, con0=0x%x, con1=0x%x, 0x%lx, 0x%lx\n",
	     freq, DISP_REG_GET(reg_va_con0), DISP_REG_GET(reg_va_con1),
	     reg_va_con0, reg_va_con1);

	cmdqRecWaitNoClear(cmdq_handle, CMDQ_EVENT_MUTEX0_STREAM_EOF);

	if (freq == 156) {
		enable_pll(VENCPLL, DISP_CLOCK_USER_NAME);
		DISP_CPU_REG_SET(reg_va_con0, DISP_MMCLK_156MHZ_CON0);
		DISP_CPU_REG_SET(reg_va_con1, DISP_MMCLK_156MHZ_CON1);
		pll_cnt++;

		/* set mux to 3 by CMDQ */
		DISP_REG_SET_PA(cmdq_handle, 0x10000048, 0x3000000);
		DISP_REG_SET_PA(cmdq_handle, 0x10000044, 0x3000000);
		DISP_REG_SET_PA(cmdq_handle, 0x10000004, 8);
	} else if (freq == 182) {
		/*NOT USE*/
	} else if (freq == 364) {
		/* set mux to 1 by CMDQ */
		DISP_REG_SET_PA(cmdq_handle, 0x10000048, 0x3000000);
		DISP_REG_SET_PA(cmdq_handle, 0x10000044, 0x1000000);
		DISP_REG_SET_PA(cmdq_handle, 0x10000004, 8);
	} else {
		pr_debug("disp_set_pll, error, invalid freq=%d\n", freq);
	}
	/* cmdqRecDumpCommand(cmdq_handle); */
	cmdqRecFlush(cmdq_handle);

	if (freq == 364) {
		if (pll_cnt != 0) {
			disable_pll(VENCPLL, DISP_CLOCK_USER_NAME);
			pll_cnt--;
		}
	}

	pr_debug("disp_set_pll(%d), after set, con0=0x%x, con1=0x%x\n",
		 freq, DISP_REG_GET(reg_va_con0), DISP_REG_GET(reg_va_con1));

	iounmap((void *)reg_va_con0);
	iounmap((void *)reg_va_con1);

	return 0;		/* cmdqRecEstimateEommandExecTime(cmdq_handle); */

}