static int dw_eth_init(struct eth_device *dev, bd_t *bis) { struct dw_eth_dev *priv = dev->priv; struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; u32 conf; if (priv->phy_configured != 1) configure_phy(dev); /* Print link status only once */ if (!priv->link_printed) { printf("ENET Speed is %d Mbps - %s duplex connection\n", priv->speed, (priv->duplex == HALF) ? "HALF" : "FULL"); priv->link_printed = 1; } /* Reset ethernet hardware */ if (mac_reset(dev) < 0) return -1; /* Resore the HW MAC address as it has been lost during MAC reset */ dw_write_hwaddr(dev); writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode); writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | TXSECONDFRAME, &dma_p->opmode); conf = FRAMEBURSTENABLE | DISABLERXOWN; if (priv->speed != 1000) conf |= MII_PORTSELECT; if ((priv->interface != PHY_INTERFACE_MODE_MII) && (priv->interface != PHY_INTERFACE_MODE_GMII)) { if (priv->speed == 100) conf |= FES_100; } if (priv->duplex == FULL) conf |= FULLDPLXMODE; writel(conf, &mac_p->conf); descs_init(dev); /* * Start/Enable xfer at dma as well as mac level */ writel(readl(&dma_p->opmode) | RXSTART, &dma_p->opmode); writel(readl(&dma_p->opmode) | TXSTART, &dma_p->opmode); writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf); return 0; }
err_t ethernetif_init(struct netif* netif) { netif->output = etharp_output; netif->name[0] = 'e'; netif->name[1] = 'n'; netif->mtu = 1500; netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_IGMP; netif->output = etharp_output; netif->linkoutput = low_level_output; eth::start_phy(); configure_phy(); return ERR_OK; }
static int dw_eth_init(struct eth_device *dev, bd_t *bis) { struct dw_eth_dev *priv = dev->priv; struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; u32 conf; if (priv->phy_configured != 1) configure_phy(dev); /* Reset ethernet hardware */ if (mac_reset(dev) < 0) return -1; /* Resore the HW MAC address as it has been lost during MAC reset */ dw_write_hwaddr(dev); writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode); writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode); writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode); conf = FRAMEBURSTENABLE | DISABLERXOWN; if (priv->speed != SPEED_1000M) conf |= MII_PORTSELECT; if (priv->duplex == FULL_DUPLEX) conf |= FULLDPLXMODE; writel(conf, &mac_p->conf); descs_init(dev); /* * Start/Enable xfer at dma as well as mac level */ writel(readl(&dma_p->opmode) | RXSTART, &dma_p->opmode); writel(readl(&dma_p->opmode) | TXSTART, &dma_p->opmode); writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf); return 0; }