static ssize_t pintest_write(
struct file *file,
const char __user *buff,
size_t count,
loff_t *ppos)
{
char mode;
int rc = 0;
if (count < 1)
return -EINVAL;
if (buff == NULL)
return -EINVAL;
if (copy_from_user(&mode, buff, count))
return -EFAULT;
mode = mode - '0';
init_current_config_pointers();
if (mode) {
/* Configure all pin test gpios for the custom settings */
rc = configure_pins(pin_test_configs, pin_config,
ARRAY_SIZE(pin_test_configs));
if (rc < 0)
return rc;
} else {
/* Configure all pin test gpios for the original settings */
rc = configure_pins(pin_config, pin_test_configs,
ARRAY_SIZE(pin_test_configs));
if (rc < 0)
return rc;
}
return rc;
}
void init_cppm_on_heartbeat_capture(void)
{
EXTERNAL_MODULE_ON();
configure_pins(HEARTBEAT_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2);
TRAINER_TIMER->ARR = 0xFFFF ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CR2 = 0 ;
TRAINER_TIMER->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0 ;
TRAINER_TIMER->CCER = TIM_CCER_CC2E ;
TRAINER_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
TRAINER_TIMER->DIER |= TIM_DIER_CC2IE ;
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
}
ret_code_t nrf_drv_i2s_init(nrf_drv_i2s_config_t const * p_config,
nrf_drv_i2s_data_handler_t handler)
{
ASSERT(handler);
ret_code_t err_code;
if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED)
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.",
(uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
if (p_config == NULL)
{
p_config = &m_default_config;
}
if (!nrf_i2s_configure(NRF_I2S, p_config->mode,
p_config->format,
p_config->alignment,
p_config->sample_width,
p_config->channels,
p_config->mck_setup,
p_config->ratio))
{
err_code = NRF_ERROR_INVALID_PARAM;
NRF_LOG_WARNING("Function: %s, error code: %s.",
(uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
configure_pins(p_config);
m_cb.handler = handler;
nrf_drv_common_irq_enable(I2S_IRQn, p_config->irq_priority);
m_cb.state = NRF_DRV_STATE_INITIALIZED;
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.",
(uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
void init_second_ppm(uint32_t period)
{
#if !defined(REVA)
// PWM1 for PPM2
register Pwm * pwmptr = PWM;
configure_pins(PIO_PC15, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ;
pwmptr->PWM_CH_NUM[1].PWM_CMR = 0x0000000B ; // CLKB
if (!g_model.moduleData[EXTRA_MODULE].ppmPulsePol) {
pwmptr->PWM_CH_NUM[1].PWM_CMR |= 0x00000200 ; // CPOL
}
pwmptr->PWM_CH_NUM[1].PWM_CPDR = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CDTY = g_model.moduleData[EXTRA_MODULE].ppmDelay*100+600 ; // Duty
pwmptr->PWM_CH_NUM[1].PWM_CDTYUPD = g_model.moduleData[EXTRA_MODULE].ppmDelay*100+600 ; // Duty pwmptr->PWM_ENA = PWM_ENA_CHID1 ; // Enable channel 1
pwmptr->PWM_IER1 = PWM_IER1_CHID1 ;
#endif
}
// SPI i/f to EEPROM (4Mb)
// Peripheral ID 21 (0x00200000)
// Connections:
// SS PA11 (peripheral A)
// MISO PA12 (peripheral A)
// MOSI PA13 (peripheral A)
// SCK PA14 (peripheral A)
// Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
void eepromInit()
{
register Spi *spiptr ;
register uint32_t timer ;
PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
/* Configure PIO */
configure_pins( 0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ;
spiptr = SPI ;
timer = ( Master_frequency / 3000000 ) << 8 ; // Baud rate 3Mb/s
spiptr->SPI_MR = 0x14000011 ; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
NVIC_EnableIRQ(SPI_IRQn) ;
eepromWriteEnable();
eepromWriteStatusRegister();
}
nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
nrfx_i2s_data_handler_t handler)
{
NRFX_ASSERT(p_config);
NRFX_ASSERT(handler);
nrfx_err_t err_code;
if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
{
err_code = NRFX_ERROR_INVALID_STATE;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
__func__,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
if (!nrf_i2s_configure(NRF_I2S,
p_config->mode,
p_config->format,
p_config->alignment,
p_config->sample_width,
p_config->channels,
p_config->mck_setup,
p_config->ratio))
{
err_code = NRFX_ERROR_INVALID_PARAM;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
__func__,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
configure_pins(p_config);
m_cb.handler = handler;
NRFX_IRQ_PRIORITY_SET(I2S_IRQn, p_config->irq_priority);
NRFX_IRQ_ENABLE(I2S_IRQn);
m_cb.state = NRFX_DRV_STATE_INITIALIZED;
NRFX_LOG_INFO("Initialized.");
return NRFX_SUCCESS;
}
void initTopLcd()
{
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_TOPLCD, ENABLE);
GPIO_TOPLCD->BSRRL = PIN_TOPLCD_CS1 | PIN_TOPLCD_CS2 ;
configure_pins( PIN_TOPLCD_LED | PIN_TOPLCD_CS1 | PIN_TOPLCD_CS2 | PIN_TOPLCD_WR | PIN_TOPLCD_DATA,
PIN_OUTPUT | PIN_PORTG| PIN_PUSHPULL | PIN_OS25 | PIN_NO_PULLUP ) ;
sendToplcdCommand(0x03, 0) ;
sendToplcdCommand(0x01, 0) ;
sendToplcdCommand(0x29, 0) ;
sendToplcdCommand(0x03, 1) ;
sendToplcdCommand(0x01, 1) ;
sendToplcdCommand(0x29, 1) ;
initTimerTopLcd() ;
VA_BL_ON ;
updateTopLCD( 0, 0 ) ;
TIM12->DIER |= 1 ; // First write to blank segments
}
void init_main_ppm(uint32_t period, uint32_t out_enable)
{
register Pwm *pwmptr ;
setupPulsesPPM(EXTERNAL_MODULE) ;
if (out_enable) {
module_output_active();
}
pwmptr = PWM ;
// PWM3 for PPM output
pwmptr->PWM_CH_NUM[3].PWM_CMR = 0x0004000B ; // CLKA
if (!g_model.moduleData[EXTERNAL_MODULE].ppmPulsePol) {
pwmptr->PWM_CH_NUM[3].PWM_CMR |= 0x00000200 ; // CPOL
}
pwmptr->PWM_CH_NUM[3].PWM_CPDR = period ; // Period in half uS
pwmptr->PWM_CH_NUM[3].PWM_CPDRUPD = period ; // Period in half uS
pwmptr->PWM_CH_NUM[3].PWM_CDTY = g_model.moduleData[EXTERNAL_MODULE].ppmDelay*100+600; // Duty in half uS
pwmptr->PWM_CH_NUM[3].PWM_CDTYUPD = g_model.moduleData[EXTERNAL_MODULE].ppmDelay*100+600; // Duty in half uS
pwmptr->PWM_ENA = PWM_ENA_CHID3 ; // Enable channel 3
pwmptr->PWM_IER1 = PWM_IER1_CHID3 ;
#if !defined(REVA)
// PWM1 for PPM2
configure_pins(PIO_PC15, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ;
pwmptr->PWM_CH_NUM[1].PWM_CMR = 0x0000000B ; // CLKB
if (!g_model.moduleData[EXTRA_MODULE].ppmPulsePol) {
pwmptr->PWM_CH_NUM[1].PWM_CMR |= 0x00000200 ; // CPOL
}
pwmptr->PWM_CH_NUM[1].PWM_CPDR = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CDTY = g_model.moduleData[EXTRA_MODULE].ppmDelay*100+600 ; // Duty
pwmptr->PWM_CH_NUM[1].PWM_CDTYUPD = g_model.moduleData[EXTRA_MODULE].ppmDelay*100+600 ; // Duty
pwmptr->PWM_ENA = PWM_ENA_CHID1 ; // Enable channel 1
pwmptr->PWM_IER1 = PWM_IER1_CHID1 ;
#endif
NVIC_SetPriority(PWM_IRQn, 3 ) ;
NVIC_EnableIRQ(PWM_IRQn) ;
}
/**
* \brief Function for calibration the DAC using the internal ADC
*
* This function will calibrate the DAC using the internal ADC, please be aware
* that signals will be outputted on the DAC pins.
*
* When calibrating always start with the offset then do gain calibration.
*
*/
static void dac_calibrate(void)
{
/* Configure the DAC output pins */
configure_pins();
/* Configure the DAC for this calibration sequence */
configure_dac();
/* Configure the ADC for this calibration sequence */
configure_adc();
/* Calibrate offset and gain for DAC CH0 */
dac_calibrate_offset(DAC_CH0);
dac_calibrate_gain(DAC_CH0);
/* Calibrate offset and gain for DAC CH1 */
dac_calibrate_offset(DAC_CH1);
dac_calibrate_gain(DAC_CH1);
adc_disable(&CALIBRATION_ADC);
}
ret_code_t nrf_drv_pwm_init(nrf_drv_pwm_t const * const p_instance,
nrf_drv_pwm_config_t const * p_config,
nrf_drv_pwm_handler_t handler)
{
ASSERT(p_config)
pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
{
return NRF_ERROR_INVALID_STATE;
}
p_cb->handler = handler;
configure_pins(p_instance, p_config);
nrf_pwm_enable(p_instance->p_registers);
nrf_pwm_configure(p_instance->p_registers,
p_config->base_clock, p_config->count_mode, p_config->top_value);
nrf_pwm_decoder_set(p_instance->p_registers,
p_config->load_mode, p_config->step_mode);
nrf_pwm_shorts_set(p_instance->p_registers, 0);
nrf_pwm_int_set(p_instance->p_registers, 0);
nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_LOOPSDONE);
nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND0);
nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND1);
nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED);
if (p_cb->handler)
{
nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_instance->p_registers),
p_config->irq_priority);
}
p_cb->state = NRF_DRV_STATE_INITIALIZED;
return NRF_SUCCESS;
}
// Initialise the SSC to allow PXX output.
// TD is on PA17, peripheral A
void init_ssc()
{
register Ssc *sscptr ;
PMC->PMC_PCER0 |= 0x00400000L ; // Enable peripheral clock to SSC
configure_pins( PIO_PA17, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA ) ;
sscptr = SSC ;
sscptr->SSC_THR = 0xFF ; // Make the output high.
sscptr->SSC_TFMR = 0x00000027 ; // 0000 0000 0000 0000 0000 0000 1010 0111 (8 bit data, lsb)
sscptr->SSC_CMR = Master_frequency / (125000*2) ; // 8uS per bit
sscptr->SSC_TCMR = 0 ; // 0000 0000 0000 0000 0000 0000 0000 0000
sscptr->SSC_CR = SSC_CR_TXEN ;
//BF:20161102 Commenting this line solve issu #3628
//#if defined(REVX)
// PIOA->PIO_MDER = PIO_PA17; // Open Drain O/p in A17
//#else
// PIOA->PIO_MDDR = PIO_PA17; // Push Pull O/p in A17
//#endif
}
// PPM output
// Timer 1, channel 1 on PA8 for prototype
// Pin is AF1 function for timer 1
static void init_pa10_ppm()
{
INTERNAL_RF_ON();
// Timer1
setupPulsesPPM(INTERNAL_MODULE) ;
ppmStreamPtr[INTERNAL_MODULE] = ppmStream[INTERNAL_MODULE];
//RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIO_INTPPM, ENABLE);
configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ;
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
TIM1->CR1 &= ~TIM_CR1_CEN ;
TIM1->ARR = *ppmStreamPtr[INTERNAL_MODULE]++ ;
TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM1->CCER = TIM_CCER_CC3E ;
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
TIM1->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
TIM1->CCR3 = (g_model.moduleData[INTERNAL_MODULE].ppmDelay*50+300)*2;
TIM1->BDTR = TIM_BDTR_MOE ;
TIM1->EGR = 1 ;
TIM1->DIER = TIM_DIER_UDE ;
TIM1->SR &= ~TIM_SR_UIF ; // Clear flag
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM1->DIER |= TIM_DIER_CC2IE ;
TIM1->DIER |= TIM_DIER_UIE ;
TIM1->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM1_CC_IRQn) ;
NVIC_SetPriority(TIM1_CC_IRQn, 7);
NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ;
NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 7);
}
// PPM output
// Timer 1, channel 1 on PA8 for prototype
// Pin is AF1 function for timer 1
static void init_pa10_ppm()
{
INTERNAL_RF_ON();
// Timer1
// setupPulsesPPM(INTERNAL_MODULE) ;
ppmStreamPtr[INTERNAL_MODULE] = ppmStream[INTERNAL_MODULE];
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ;
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
TIM1->CR1 &= ~TIM_CR1_CEN ;
TIM1->ARR = *ppmStreamPtr[INTERNAL_MODULE]++ ;
TIM1->PSC = (PeripheralSpeeds.Peri2_frequency * PeripheralSpeeds.Timer_mult2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM1->CCER = TIM_CCER_CC3E ;
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
TIM1->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
TIM1->CCR3 = (g_model.ppmDelay*50+300)*2;
TIM1->BDTR = TIM_BDTR_MOE ;
TIM1->EGR = 1 ;
TIM1->DIER = TIM_DIER_UDE ;
TIM1->SR &= ~TIM_SR_UIF ; // Clear flag
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM1->DIER |= TIM_DIER_CC2IE ;
TIM1->DIER |= TIM_DIER_UIE ;
TIM1->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority( TIM1_CC_IRQn, 3 ) ; // Lower priority interrupt
NVIC_SetPriority( TIM1_UP_TIM10_IRQn, 3 ) ; // Lower priority interrupt
NVIC_EnableIRQ(TIM1_CC_IRQn) ;
NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ;
}
// PPM output
// Timer 1, channel 1 on PA8 for prototype
// Pin is AF1 function for timer 1
static void intmodulePpmStart()
{
INTERNAL_MODULE_ON();
// Timer1
modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
configure_pins(INTMODULE_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25);
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
// setupPulsesPPM() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupPulsesPPM(INTERNAL_MODULE) ;
INTMODULE_TIMER->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
INTMODULE_TIMER->CCER = TIM_CCER_CC3E ;
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
INTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
INTMODULE_TIMER->BDTR = TIM_BDTR_MOE ;
INTMODULE_TIMER->EGR = 1 ;
INTMODULE_TIMER->DIER = TIM_DIER_UDE ;
INTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ;
INTMODULE_TIMER->DIER |= TIM_DIER_UIE ;
INTMODULE_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM1_CC_IRQn) ;
NVIC_SetPriority(TIM1_CC_IRQn, 7);
NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ;
NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 7);
}
void initHaptic()
{
configure_pins( GPIO_Pin_HAPTIC, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTC ) ;
GPIOHAPTIC->BSRRH = GPIO_Pin_HAPTIC ;
}
void pwrInit()
{
// Configure RF_power (PC17)
configure_pins(PIO_PC17, PIN_ENABLE | PIN_INPUT | PIN_PORTC | PIN_NO_PULLUP | PIN_PULLDOWN);
configure_pins(PIO_PA8, PIN_ENABLE | PIN_INPUT | PIN_PORTA | PIN_PULLUP); // Enable bit A8 (Soft Power)
}
// turn off soft power
void pwrOff()
{
#if !defined(REVA)
configure_pins(PIO_PA8, PIN_ENABLE | PIN_OUTPUT | PIN_LOW | PIN_PORTA | PIN_NO_PULLUP);
#endif
}
void init_soft_power()
{
// GPIO_InitTypeDef GPIO_InitStructure;
/* GPIOC GPIOD clock enable */
RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN ; // Enable portD clock
#ifdef REVPLUS
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
#endif
#ifdef PCB9XT
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
#endif
GPIO_ResetBits(GPIOPWRINT, PIN_INT_RF_PWR );
GPIO_ResetBits(GPIOPWREXT, PIN_EXT_RF_PWR);
// RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOPWR, ENABLE);
/* GPIO Configuration*/
#ifdef REVPLUS
configure_pins( PIN_INT_RF_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTC ) ;
configure_pins( PIN_EXT_RF_PWR | PIN_MCU_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTD ) ;
#else
#ifdef PCB9XT
configure_pins( PIN_INT_RF_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTC ) ;
configure_pins( PIN_EXT_RF_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTD ) ;
#else
configure_pins( PIN_INT_RF_PWR | PIN_EXT_RF_PWR | PIN_MCU_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTD ) ;
#endif
#endif
// configure_pins( PIN_INT_RF_PWR | PIN_EXT_RF_PWR, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTD ) ;
// GPIO_InitStructure.GPIO_Pin = PIN_MCU_PWR;
// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
// GPIO_Init(GPIOPWR, &GPIO_InitStructure);
#ifdef PCB9XT
configure_pins( PIN_PWR_STATUS, PIN_INPUT | PIN_PORTC ) ;
#else
configure_pins( PIN_PWR_STATUS, PIN_INPUT | PIN_PULLUP | PIN_PORTD ) ;
#endif
#ifdef PCB9XT
configure_pins( PIN_MCU_PWR, PIN_INPUT | PIN_PULLUP | PIN_PORTC ) ;
#else
configure_pins( PIN_TRNDET, PIN_INPUT | PIN_PULLUP | PIN_PORTA ) ;
#endif
// GPIO_InitStructure.GPIO_Pin = PIN_PWR_STATUS;
// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
// GPIO_Init(GPIOPWR, &GPIO_InitStructure);
// configure_pins( PIN_PWR_LED, PIN_OUTPUT | PIN_OS100 | PIN_PUSHPULL | PIN_PORTC ) ;
// GPIO_InitStructure.GPIO_Pin = PIN_PWR_LED;
// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
// GPIO_Init(GPIOPWRLED, &GPIO_InitStructure);
// Soft power ON
// Not yet!!!!*********
#ifndef PCB9XT
GPIO_SetBits(GPIOPWR,PIN_MCU_PWR);
#endif
#ifdef REV9E
PowerState = POWER_STATE_START ;
#endif
}
void module_output_low()
{
configure_pins( PIO_PA17, PIN_OUTPUT | PIN_PORTA | PIN_PULLUP | PIN_ODRAIN | PIN_LOW ) ;
}
// Configure PWM3 as PPM drive,
// PWM0 is LED backlight PWM on PWMH0
// This is PC18 peripheral B, Also enable PC22 peripheral B, this is PPM-JACK (PWML3)
//
// REVB board:
// PWML2, output as peripheral C on PA16, is for HAPTIC
// For testing, just drive it out with PWM
// PWML1 for PPM2 output as peripheral B on PC15
// For testing, just drive it out with PWM
void init_pwm()
{
#ifdef REVB
#else
register Pio *pioptr ;
#endif
register Pwm *pwmptr ;
register uint32_t timer ;
PMC->PMC_PCER0 |= ( 1 << ID_PWM ) ; // Enable peripheral clock to PWM
MATRIX->CCFG_SYSIO |= 0x00000020L ; // Disable TDO let PB5 work!
/* Configure PIO */
#ifdef REVB
#else
pioptr = PIOB ;
pioptr->PIO_PER = 0x00000020L ; // Enable bit B5
pioptr->PIO_ODR = 0x00000020L ; // set as input
#endif
#ifdef REVB
configure_pins( PIO_PA16, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_C | PIN_PORTA | PIN_NO_PULLUP ) ;
#endif
configure_pins( PIO_PC18, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ;
#ifdef REVB
configure_pins( PIO_PC22, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ;
#endif
// Configure clock - depends on MCK frequency
timer = Master_frequency / 2000000 ;
timer |= ( Master_frequency / ( 32* 10000 ) ) << 16 ;
timer &= 0x00FF00FF ;
pwmptr = PWM ;
pwmptr->PWM_CLK = 0x05000000 | timer ; // MCK for DIVA, DIVA = 18 gives 0.5uS clock period @35MHz
// MCK/32 / timer = 10000Hz for CLKB
// PWM0 for LED backlight
#ifdef REVX
pwmptr->PWM_CH_NUM[0].PWM_CMR = 0x0000000C ; // CLKB
#else
pwmptr->PWM_CH_NUM[0].PWM_CMR = 0x0000000B ; // MCK/1024
#endif
pwmptr->PWM_CH_NUM[0].PWM_CPDR = 100 ; // Period
pwmptr->PWM_CH_NUM[0].PWM_CPDRUPD = 100 ; // Period
pwmptr->PWM_CH_NUM[0].PWM_CDTY = 40 ; // Duty
pwmptr->PWM_CH_NUM[0].PWM_CDTYUPD = 40 ; // Duty
pwmptr->PWM_ENA = PWM_ENA_CHID0 ; // Enable channel 0
#ifdef REVB
// PWM2 for HAPTIC drive 100Hz test
pwmptr->PWM_CH_NUM[2].PWM_CMR = 0x0000000C ; // CLKB
pwmptr->PWM_CH_NUM[2].PWM_CPDR = 100 ; // Period
pwmptr->PWM_CH_NUM[2].PWM_CPDRUPD = 100 ; // Period
pwmptr->PWM_CH_NUM[2].PWM_CDTY = 40 ; // Duty
pwmptr->PWM_CH_NUM[2].PWM_CDTYUPD = 40 ; // Duty
pwmptr->PWM_OOV &= ~0x00040000 ; // Force low
pwmptr->PWM_OSS = 0x00040000 ; // Force low
// pwmptr->PWM_ENA = PWM_ENA_CHID2 ; // Enable channel 2
#endif
}
extern "C" int main() {
turn_on_crystal_oscillator();
start_system_pll();
start_usb_pll();
set_main_clock_to_system_pll();
enable_peripheral_clocks();
serial_init();
configure_pins();
delay(1000000);
//enable_clock_output();
NVIC.enable_interrupts();
//serial_write_string("main():loop");
//serial_write_line();
// Power for FPGA
v1p2_enable(); // FPGA VCCINT
v2p5_enable(); // FPGA PLLs?
v1p8_enable(); // FPGA VCCIOs, DDR2.
v1p1_enable(); // USB internal voltage
delay(1000000);
// Power for the clock generator.
// V3P3A must be turned on *after* V1P8 to satisfy
// Si5351C requirement.
v3p3a_enable();
delay(1000000);
// I2C configuration
i2c0_init(500);
// Give Si5351C time to power up?
delay(100000);
si5351c_disable_all_outputs();
//si5351c_disable_oeb_pin_control();
si5351c_power_down_all_clocks();
si5351c_set_crystal_configuration();
si5351c_enable_xo_and_ms_fanout();
si5351c_configure_pll_sources_for_xtal();
si5351c_configure_pll1_multisynth();
si5351c_configure_multisynth(4, 1536, 0, 1, 0); // 50MHz
si5351c_configure_multisynth(5, 1536, 0, 1, 0); // 50MHz
si5351c_configure_multisynths_6_and_7();
si5351c_configure_clock_control();
si5351c_enable_clock_outputs();
clockgen_output_enable();
fe_enable();
while(true) {
//write_led_status(read_fpga_conf_done());
write_led_status(1);
delay(1000000);
write_led_status(0);
delay(1000000);
}
return 0;
}
static void init_pa7_dsm2()
{
EXTERNAL_RF_ON();
// Timer8
setupPulsesDSM2(EXTERNAL_MODULE);
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
#if defined(REV3)
configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ;
#else
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIO_EXTPPM, ENABLE);
GPIO_PinAFConfig(GPIO_EXTPPM, GPIO_PinSource_EXTPPM, GPIO_AF_TIM8);
GPIO_InitStructure.GPIO_Pin = PIN_EXTPPM_OUT;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIO_EXTPPM, &GPIO_InitStructure);
#endif
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 44000 ; // 22mS
TIM8->CCR2 = 40000 ; // Update time
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
#if defined(REV3)
TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ;
#else
TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
#endif
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
TIM8->CCR1 = dsm2Stream[0] ;
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
TIM8->EGR = 1 ; // Restart
// TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
// TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
TIM8->DCR = 13 ; // DMA to CC1
// TIM8->CR1 = TIM_CR1_OPM ; // Just run once
// Enable the DMA channel here, DMA2 stream 2, channel 7
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_SetPriority(TIM8_CC_IRQn, 7);
}
void ispForceResetOff()
{
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( GPIO_Pin_M64_RST, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTC ) ;
RST_HIGH() ; /* RST high */
}