static void __init at91sam9260_map_io(void) { if (cpu_is_at91sam9xe()) at91sam9xe_map_io(); else if (cpu_is_at91sam9g20()) at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE); else at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); }
static void __init at91sam9260_map_io(void) { if (cpu_is_at91sam9xe()) { at91sam9xe_map_io(); } else if (cpu_is_at91sam9g20()) { at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE); at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE); } else { at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE); at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE); } }
static void __init at91sam9260_map_io(void) { if (cpu_is_at91sam9xe()) { at91sam9xe_map_io(); } else if (cpu_is_at91sam9g20()) { at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE); at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE); } else { at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE); at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE); } #ifdef CONFIG_IPIPE iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); #endif /* CONFIG_IPIPE */ }