static void riscv_irq_unmask(struct irq_data *d)
{
switch (d->irq) {
case IRQ_TIMER:
csr_set(sie, SIE_STIE);
break;
case IRQ_SOFTWARE:
csr_set(sie, SIE_SSIE);
break;
default:
BUG();
}
}
static int
htif_attach(device_t dev)
{
struct htif_softc *sc;
int error;
sc = device_get_softc(dev);
sc->dev = dev;
if (bus_alloc_resources(dev, htif_spec, sc->res)) {
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
}
/* Setup IRQs handler */
error = bus_setup_intr(dev, sc->res[0], INTR_TYPE_CLK,
htif_intr, NULL, sc, &sc->ihl[0]);
if (error) {
device_printf(dev, "Unable to alloc int resource.\n");
return (ENXIO);
}
csr_set(sie, SIE_SSIE);
return (htif_enumerate(sc));
}
int arch_cpu_init_dm(void)
{
int ret;
ret = riscv_cpu_probe();
if (ret)
return ret;
/* Enable FPU */
if (supports_extension('d') || supports_extension('f')) {
csr_set(MODE_PREFIX(status), MSTATUS_FS);
csr_write(fcsr, 0);
}
if (CONFIG_IS_ENABLED(RISCV_MMODE)) {
/*
* Enable perf counters for cycle, time,
* and instret counters only
*/
csr_write(mcounteren, GENMASK(2, 0));
/* Disable paging */
if (supports_extension('s'))
csr_write(satp, 0);
}
return 0;
}